Numerical Modeling of Segmented Signal Return Planes
Yun Ji
Electromagnetic Compatibility Laboratory
University of Missouri-Rolla
Rolla, MO 65401
yji@umr.edu
Printed circuit board designers sometimes put gaps in ground planes
to isolate analog and digital signals. When active traces are routed over
gaps in the power and ground planes, the electromagnetic emissions from
the board may increase significantly and signal integrity may be degraded
[1]. Similarly, when the DC power layer is the signal return plane and
high-speed traces are routed across gaps due to log. This summary describes
modeling of a simple trace-over-gap configuration. Both experimental and
numerical results are presented.
As shown in Figure 1, the PCB board under study is 10 cm long, 6 cm wide and 50 mils (1.3 mm) thick. The relative permittivity of the FR4 material is approximate 4.5. A gap is cut in the middle of the ground plane. The gap is 4 cm long and 5 mm wide. An 8.2-cm long trace crosses the gapped ground plane. The trace is terminated at one end by a 47 W SMT resistor. An impedance analyzer is used to measure the input impedance at the feeding end.
A hybrid FEM/MoM code (EMAP5) developed at UMR [2] is used to model
this problem. MoM is used to model the fields on the surface of the board
while FEM is used to model the fields within the dielectric. Triangular
elements are used to approximate the surface fields, and tetrahedral elements
approximate the fields within the dielectric. Since the fields around the
gap area change rapidly, very fine triangular and tetrahedral elements
are employed in the gap area while large elements are employed in other
places. For this problem, two meshes are used. One is a coarse mesh as
shown in Figure 2, which requires 32 Mbytes
of computer memory. The other is a fine mesh as shown in Figure
3, which requires 45 Mbytes of computer memory. The same problem is
also modeled using EMSIM, a moment method code marketed by Pacific Numerix.
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