I.     Introduction

The module-on-backplane and stacked-card are both common configurations in high-speed digital designs. A typical module-on-backplane or stacked-card structure is of appreciable electrical extent, and functions as an EMI antenna at several hundred MHz. Three issues to be considered for understanding EMI related to inter-board connection include the connection itself, the signal routing on the PCBs, and the radiating EMI antenna. In this work, the signal routing on the PCBs is omitted. The FDTD method was utilized to model this problem because of the capability for analyzing multiple frequencies with a single time-domain simulation, and further, FDTD is well-suited for low loss cases with rectilinear geometries.

Three testfixtures including both the module-on-backplane and stacked-card configurations were built for study. Each testfixtue included a mother-board, a daughter-board, a inter-PCB connection between two boards, and a piece of semi-rigid cable attached to the mother-board. Common-mode current on the attached cable was measured. The FDTD method was applied and modeled results were compared to the measurements. The general setup of the three measurements is similar. A demnonstration of the setup with the module-on-backplane configuration is shown in Figure 1. The three cases studied are:
 
1.  The module-on-backplane configuration with a one-signal-one-return conneciton.
2.  The stacked-card configuration with a one-signal-one-return connection.
3.  The stacked-card configuration with a one-signal-six-return connection.


The cell size in the FDTD modeling for the module-on-backplane configuration was 10 mm ´ 4 mm ´ 5 mm and the time step was 8.285004e-12 s. With this approach, the largest cell size dimension (10 mm) was oriented along the longest board dimension, and the total cell number including the perfect matched layers  was minimized to around 380,000 cells. The white space placed at each direction was 7 cells. The aluminum plate was modeled as an infinite ground plane. The computing time was reduced when Prony’s or the GPOF method was applied.

FDTD method with a finer mesh was used to model  the two stacked-card configurations and the reults will be shown in Section III.

Measurements and modeled results for the three cases described above:
 
1.  The module-on-backplane configuration with a one-signal-one-return conneciton.
2.  The stacked-card configuration with a one-signal-one-return connection.
3.  The stacked-card configuration with a one-signal-six-return connection.


The discrepancies may be due in part to:

• The dielectric layer of the PCBs was not included in the modeling,
• The finite aluminum plate was modeled as an infinite ground plane, and
• Measurement errors.

Acknowledgement:

This work was supported in part by AMP, Inc. through the UMR EMC Consortium.