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IEEE Central North Carolina ED/MTT/SSC Joint Society Chapter

Electron Devices Society Microwave Theory and Techniques Society  |  Solid-State Circuits Society


IEEE  Central North Carolina ED_MTT_SSC Joint Society Chapter Seminar Series  

For more information contact: Tony Ivanov TIvanov@rfmd.com 336-678-7906

Programs
20052006 | 2007


Date - Nov 21, 2005 
Time - 6:00 - 7:00 pm
Speaker - 
Dr. Paul Ampadu, University of Rochester  <<Dr. Ampadu Bio>>
Talk -
Nov 21, 2005: Ultra-low Voltage Design Techniques for Nanoscale Silicon CMOS

Abstract
Because of the quadratic relationship between power and voltage, supply voltage reduction has
become an important method for reducing active power in VLSI systems, improving reliability in
highly scaled MOSFETs, and minimizing the effects of heat dissipation in high-performance systems.
As silicon CMOS is scaled beyond the 90 nm and 65nm to the 32 nm and 22 nm technology nodes,
ultra-low supply voltage becomes one of the most critical and powerful mechanisms for improving
device reliability and energy efficiency. Unfortunately, ultra-low voltage operation has been limited by
performance constraints and other challenges. This presentation evaluates the current state of low voltage
VLSI design, provides techniques for maintaining acceptable throughputs at these sub-volt supplies, and
suggests noise tolerant techniques to mitigate the reduced voltage margins. Trends and
prospects for
ultra-low voltage VLSI in nanoscale CMOS are discussed.


As usual, pizza and refreshments will be provided. 

Contact: Tony Ivanov TIvanov@rfmd.com 336-678-7906


Date - Oct. 24, 2005 (Monday) 
Time - 6:00 - 7:00 pm
Speaker -Dr. Yuhua Cheng, Siliconlinx, Inc.   <<DrYuhuaCheng_Bio>>

Talk - The Influence and Modeling of Process Variation and Device Mismatch for Analog/RF Circuit Design   PDF  10/28/05

This talk will review the influence of local process variation and device mismatch to the electrical characteristics of resistors, capacitors, and MOSFETs. The discussion is mainly focus on the device mismatch as it becomes more and more important in analog design utilizing modern CMOS technology. The models to describe the mismatch behavior are also discussed. To reduce the design circle and help improving the circuit yields, physical and accurate statistical modeling approach is needed to predict correctly the circuit behavior with the consideration of local process variation and device mismatch. As an example, an advanced statistical model based on totally independent process variables is presented. It can predict the measured data well at different bias conditions for devices with wide geometries.


Date - Sept. 15, 2005
Speaker -Dr. Juin J. Liou, University of Central Florida,   <<JJLiou_Bio>>
Talk - On-chip Spiral Inductors for RF Applications, <<Inductors.ppt>>
 


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