There is a disconnect in the EMC world between system manufacturers testing systems for upset and device manufacturers testing devices for failure. Some system level manufacturers are pushing device manufacturers to test semiconductor devices using system level compliance standards – specifically, IEC 61000-4-2 for ESD (Electrostatic Discharge). I’m sure the product manufacturers believe that if devices are qualified to IEC standard(s), finished products will likewise be qualified.

Unfortunately, there is a fundamental difference between system level and device level testing; fortunately however, this difference can be bridged using susceptibility scanning. Manufacturers have used crude methods of susceptibility scanning for some time but new automated methods and software analysis allow quickly pinpointing sensitive circuits and devices down to specific pins on an IC. Software allows not only the identification of sensitive areas, but can plot the relative sensitivities providing a 3 dimensional look at a circuit’s susceptibility.

Seating is limited, so please RSVP to Paul Stover (paul.stover@adtran.com) by close of business May 19, 2009 with your intent to attend and if you will be joining us for the meal.