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IEEE Orlando Section Monthly
http://www.ieee.org/orlando/

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November 2003

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Executive Committee (EXCOM) Meeting

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PES/IA/PEL November Officer's Meeting

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PES/IA/PEL Chapter Meeting

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Joint ED/CPMT, UFFC, SRC Chapters Meeting

Joint IEEE Student Branch & Computer Chapter Meeting

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Executive Committee (EXCOM) Meeting

Date:

Tuesday, Nov. 4th

Time:

6:00 - 6:30 pm Social
6:30 - 8:00 pm EXCOM Meeting

Place:

Louie & Maria Restaurant
9728 E. Colonial Dr., 407-277-7755

Topic:

Executive Committee (EXCOM) Meeting

Speaker:


Contact:

Robert J. Pirela, EXCOM Chair
Tel: 407-657-6616
Click here to make reservations


PES/IA/PEL November Officer's Meeting:

Date:

Wednesday, November 5th

Time:

6:30 pm

Place:

Tijuana Flats, Downtown Orlando

Topic:

PES/IA/PEL Officer's Meeting

Contact:

Debra Prince
(407) 942-9296 office, (407) 810-8951 cell
Click here to make reservations


PES/IA/PEL Chapter Meeting

Date:

Thursday, November 13th

Time:

6:00 pm
We will be providing pizza and sodas.

Place:

UCF, Student Union

Topic:

Engineering for Safety

Speaker:

Jorge Pardo, PE

Contact:

Debra Prince
(407) 942-9296 office, (407) 810-8951 cell
Click here to make reservations


Joint ED/CPMT, UFFC, SRC Chapters Meeting

Date:

Monday, November 17, 2003

Time:

2:00 - 3:00pm

Place:

Room 232, Computer Science Building, University of Central Florida

Topic:

An Overview of Device Behavior and Modeling Issues in CMOS Technology for RF IC Design

Speaker:

Yuhua Cheng, Distinguished Lecturer
Skyworks Solutions, Inc., California

Abstract:

This talk will overview the status of the process development and device design in RF CMOS technology, which is an attractive potential process candidate for wireless communication applications. The impact of downscaling of CMOS technology to the RF applications will be discussed first. Then the trend of the device performance will be summarized to understand the device behavior better for RF design requirements. Several important figure-of-merits for MOS transistors such as cutoff frequency (fT), maximum oscillation frequency (fmax), power-gain, noise figure (NF) and linearity etc. will be analyzed together with the discussion of other device components to explore the details of RF CMOS technology. Modeling issues are also introduced while discussing device design to optimize the device performance for designers to have better RF circuits. Finally some limitations of the current RF CMOS process are addressed to have a complete understanding of RF CMOS technology.

Bio:

Yuhua Cheng received the B.S. degree in electrical engineering from Shandong Polytechnic University, Jinan, China in 1982, the M. S. degree in electrical engineering from Tianjin University, Tianjin, China in
1985, and the Ph.D. degree in electrical engineering from Tsinghua University, Beijing, China in 1989.
 
In 1990, he joined in the Institute of Microelectronics (IME), Peking University, China as an assistant professor. From 1992 to 1996, he was an associate professor in the IME and the Department of Computer Science and Technology. From 1994 to 1995, he was a Visiting Professor at the University of Trondheim, Norway, and a Research Fellow of the Norwegian Research Council. From 1995 to 1997, he was a Research Associate at the Department of Electrical Engineering and Computer Sciences, University of California, Berkeley, where he was working on the BSIM3 model development and providing technical support to the BSIM3 users from both industry and academics. He was the project coordinator of the BSIM3v3 model development and was one of the
principal contributors of the BSIM3v3 model. In 1997, he worked for a short period in Cadence Design Systems as a Member of Consultant Staff
before he joined Skyworks Solutions (formerly Conexant Systems and Rockwell Semiconductor Systems), where he is currently the senior manager of device modeling and technology team responsible for Mixed-signal/RF device (bipolar, MOS and passive) modeling, DRC/LVS/PEX support and foundry technology evaluations/assessments for various (ASIC, Mixed-signal, RF) circuit designs.
 
He serves technical program committees in several international conferences including the IEEE Custom Integrated Circuits Conference (CICC) and Radio Frequency Integrated Circuits Symposium. He has
authored and co-authored over 70 research papers, and two books.
 
He is a senior member of IEEE, and serves in the Regions/Chapter Committee of IEEE Electron Device Society and the vice-chair of the North America West subcommittee for Regions/Chapters (SRC-NAW) of the EDS Regions/Chapters Committee. He is an EDS Distinguished Lecturer.

Contact:

Anwar Sadat, Chair, ED/CPMT Orlando Chapter Tel: 407-207-4941
Click here to make reservations


Joint IEEE Student Branch & Computer Chapter Meeting

Date:

Monday, November 17, 2003

Time:

7:00 PM
Pizza will be provided

Place:

UCF, ENGR1, room 288

Topic:

Multiprotocol Label Switching and Border Gateway Protocol

Speaker:

Joe Juisai, Senior Technical Staff Member with AT&T Global Enhanced VPN Services organization

Abstract:

This talk will be a high-level view of the Multiprotocol Label Switching and the Border Gateway Protocol (MPLS-BGP) and its impact on today's wide area network. In addition, a historical overview of wide-area networks will also be discussed.

Bio:

Joe Juisai [S 1999, M 2000] is currently a Senior Technical Staff Member with AT&T Global Enhanced VPN Services organization in Lake Mary, Florida. He is a system enablement engineer responsible for deploying managed enhanced VPN services for worldwide clients. Previously, he was a project manager in charge with merging and separating networks when AT&T purchases and divest businesses. He received his B.S. degree in chemical engineering from Rensselaer Polytechnic Institute, Troy, New York, in 1997 and his M.Eng. degree in electrical engineering from Rensselaer Polytechnic Institute in 1999. His interests include network security, wireless networking and voice over data networks.

Contact:

Mike Miller, UCF IEEE Vice Chair
Click here to make reservations


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November 2003

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