RMCEMC June Meeting

To be involved with Signal Integrity design is to be involved at the very heart of product  functional operation. Without a systematic approach to Signal Integrity design, a typical  product design cycle can be lengthened dramatically with iterative bench debug and worse yet erratic performance in the field.

This talk provided an overview of all the related design items that make up the Signal Integrity discipline. It introduced first generation synchronous timing analysis, setup and hold times, typical clock and edge rates. The presentation then show how well designed traces at high frequencies act as transmission line and examine reflections with a simple lattice diagram to illustrate. Discontinuities (branches and stubs) with an introduction to parallel and series termination were then discussed.  The talk also included what-if simulation analyzing simple net with imperfect terminations (Mentor Expedition PCB with Signal Vision SI Analysis). We examined how switching margins, ringing (overshoot and ring back), ground bounce and power droop all affect the signal quality.

.In the second half of the talk we were introduced to  crosstalk,  source synchronous signaling, multidrop buses, typical clock and edge rates and the basics of transmission line losses and how they affect signal quality. We also discussed dielectric and skin losses and their significance at the clock speeds and examine the need to close decoupling and power plan analysis at higher clock rates. The need to occasionally use non-ideal return paths and how these affect switching was discussed.

 Ian C. Dodd Ian graduated with a BSc (with honours) in  Physics from  Loughborough University, England and a MSc, in Technological Economics, Stirling University, Scotland.

Ian started his career as an EE, designing intelligent, networked data acquisition and control systems. The first of these were for high voltage power distribution. Later he moved into oil and gas automation. Very early Ian started doing co-design of hardware and software. As the software content increased, he transitioned over to full time software development.

For the last 18 years, Ian has been employed in creating Electric Design Automation tools, with the last 14 years specializing in Signal Integrity tools. Ian was the principal engineer on the first and second generation SI tools from VeriBest Inc (formerly Intergraph Electronics). He is presently the High Speed Tools Architect at Mentor Graphics Inc