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IEEE Workshop on Microelectronics and Electron Devices (WMED)

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Invited Tutorial - Phase Change Memory: Replacement or Transformational

Dr. Chung H. Lam, International Business Machines


In this tutorial, a short account on the working principles of Phase Change Memory and its development will be introduced, followed by a comprehensive comparison with incumbent and other emerging memory technologies. Focus will be drawn to the technical requirements for the replacement of DRAM and NAND Flash with new memory technologies as these incumbent technologies are approaching their physical limits of conventional two-dimension scaling. Existing characteristics and the current state of the development of Phase Change Memory in the industry are examined to match the requirements of a replacement for DRAM and NAND Flash separately. The replacement scenario will be summarized with suggestions for further development. The transformational scenario begins with a study of the current landscape and future directions in enterprise computing and consumer electronics. We shall examine the opportunity of introducing a new memory system requiring holistic and collaborative efforts among the system and processor designers, as well as software engineers. Again, suggestions on further development directions for Phase Change Memory for the transformation scenario will be outlined.

Speakerís biography:

Chung Lam started his electrical engineering career at IBM Burlington as a memory circuit designer in 1978, upon graduating from the Polytechnic University of New York in 1978 with a B.Sc. In 1984 he was awarded the IBM Resident Study Fellowship and received his M.Sc. and Ph.D., both in Electrical Engineering, at Rensselaer Polytechnic Institute in 1987 and 1988, respectively. Since 1988, he had taken responsibilities in various disciplines of semiconductor research and development including circuit and device designs, as well as process integrations for memory and logic applications in IBMís Microelectronics Division. Currently, Chung is a manager at the IBM Research Division at the T.J. Watson Research Center leading the research on new non-volatile memory technologies. Chung was named an IBM Distinguished Engineer in 2007 and an IBM Master Inventor in 2009. He has about 160 issued US patents and has published more than 60 papers. He has been a member of the Technical Committee of the IEEE Non-Volatile Memory Workshop since 2001, and the IEEE International Memory Workshop since 2008 to 2011. Chung has also been a member of the Technical Committee of the VLSI-TSA since 2007, the ITRS Semiconductor Road Map Committee since 2008, and the IEDM 2011 Memory Technology Committee.





This workshop is receiving technical co-sponsorship support from the IEEE Electron Devices Society.

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