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Invited Tutorial - Channel Equalization: Techniques for High-Speed Electrical Links

Prof. Samuel Palermo, Texas A&M University


While high-performance I/O circuitry can leverage the technology improvements that enable increased on-chip performance, unfortunately the bandwidth of the electrical channels used for inter-chip communication has not scaled in the same manner. This tutorial provides an overview of channel equalization techniques used in multi-Gb/s transceivers to overcome bandwidth limitations present in electrical chip-to-chip communication. The first part of the tutorial will cover the dominant sources of electrical interconnect channel losses, such as skin effect, dielectric loss, and reflections due to impedance discontinuities. Next, trade-offs and circuit implementations of common equalizer circuits, including finite-impulse-response (FIR) filters, continuous-time linear equalizers (CTLE), and decision-feedback equalizers (DFE), are detailed. The performance impact of these different equalizer topologies over real-world channels is illustrated using a statistical link analysis tool and through a comparison of several recent high-performance I/O transceiver implementations. Finally, the tutorial concludes with a discussion on different equalizer adaptation techniques.

Speakerís biography:

Samuel Palermo received the B.S. and M.S. degree in electrical engineering from Texas A&M University, College Station, TX in 1997 and 1999, respectively, and the Ph.D. degree in electrical engineering from Stanford University, Stanford, CA in 2007.

From 1999 to 2000, he was with Texas Instruments, Dallas, TX, where he worked on the design of mixed-signal integrated circuits for high-speed serial data communication. From 2006 to 2008, he was with Intel Corporation, Hillsboro, OR, where he worked on high-speed optical and electrical I/O architectures. In 2009, he joined the Electrical and Computer Engineering Department of Texas A&M University where he is currently an assistant professor. His research interests include high-speed electrical and optical links, clock recovery systems, and techniques for device variability compensation.

Dr. Palermo is a member of IEEE and Eta Kappa Nu. He has served on the IEEE CAS Board of Governors from 2011 to 2012. He was a coauthor of the Jack Raper Award for Outstanding Technology-Directions Paper at the 2009 International Solid-State Circuits Conference.





This workshop is receiving technical co-sponsorship support from the IEEE Electron Devices Society.

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