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November 16, 2009 Event--Cosponsored by the IEEE SCV EDS Society

6:30pm: Networking/Pizza Social
7:00pm: Announcement
7:05pm: Presentation
8:15pm: Adjourn
Cost: Free. $2 donation accepted for food.

Location: Cadence Design Systems, Building 5

Title

Reverse Engineering in the Semiconductor Industry

Speaker

Mr. Randy Torrance, B.A.Sc.E.E.,M.A.Sc.E.E. (Chipworks)

Abstract

The continuous drive of Moore's law to increase the integration level of silicon chips has presented major challenges to the reverse engineer, obsolescing simple teardowns and demanding the adoption of new and more sophisticated technology to analyze chips. The following types of analysis will be covered in detail:

This presentation is an update of the invited paper given at the 2007 IEEE Custom Integrated Circuits Conference (CICC) with more focus on circuit extraction and cross-referencing between circuit schematics and the 1000's of physical layout images obtained through generating a mosaic of scanning electron microscopy across all device layers.

Biography

Randy Torrance leads the Circuit Analysis team for the Technical Intelligence group at Chipworks. During Randy's 22 years in the technology industry he has held senior technical and management positions in the IC design and electronic systems areas.

Prior to joining Chipworks Randy was Director of IC Technology Development for Atmos/Mosys, and was responsible for teams designing cutting-edge embedded memory macros. Before that he spent 12 years at Mosaid, where he held positions ranging from Senior Design Engineer through Manager IC Design to Director of IC Design, Switching Products. Here he led groups designing commodity and custom memories, and large ASICs for the graphics and networking markets.

Randy holds a B.A.Sc. and M.A.Sc. in Electrical Engineering from the University of Waterloo.

October 19, 2009: "Energy-efficient on-chip power management: System, circuit and device perspectives" by Prof. Eduard Alarcón, Universitat Politecnica De Catalunya, IEEE CAS Distinguished Lecturer

Abstract: Trends in portable applications such as mobile terminals for next generation communications proceed in the direction of increasing the computational load while concurrently reducing size and enhancing operating lifetime. Conversely, the density of energy sources is only expected to slightly increase. In front of this scenario, there exists a demand in improved power management integrated circuits to avoid a powering crisis in future systems-on-chip. The ultimate step consequently consists in the fully monolithic integration of the power converter together with the circuits that constitute its load within either the same substrate or chip package, yielding a complete Powered System on a Chip (PSOC). This lecture will cover efficient energy processing circuits within an integrated circuit environment, which requires a multidisciplinary approach through concurrence of analog and mixed-signal IC design, power electronics and control theory disciplines. Topics covered will encompass on-chip power supply design and implementation, efficiency optimization, IC-compatible power inductors and capacitors, power MOSFET switches and efficient switch drivers, analog current-mode controller IC design, digital controllers, system and circuit-level design of on-chip adaptive power management techniques, adaptive wideband envelope-tracking power supplies for RF power amplifiers, and adaptive voltage scaling for low-power microprocessor and DSP supply.

Bio: Eduard Alarcón (S'96, M'01) received the M. Sc. (national award) and Ph.D. degrees in electrical engineering from the Technical University of Catalunya (UPC), Barcelona, Spain, in 1995 and 2000, respectively. Since 1995 he has been with the Department of Electronic Engineering at the Technical University of Catalunya, where he became Associate Professor in 2000. During the period 2006-2009 he has been Associate Dean of International Affairs at the School of Electrical Engineering, UPC. From August 2003 to January 2004, he was a Visiting Professor at the CoPEC center, University of Colorado at Boulder, USA. He has co-authored more than 130 international scientific publications, 3 book chapters and 2 patents, and has been involved in different national and US R&D projects. His current research interests include the areas of analog and mixed-signal integrated circuits, on-chip power management circuits, wireless energy transfer and nanonetworks. He has given 12 invited or plenary lectures and tutorials in Europe, America and Asia, and has been elected by the IEEE CAS society as distinguished lecturer for 2009-2010. He was recipient of the Myril B. Reed Best Paper Award at the 1998 IEEE Midwest Symposium on Circuits and Systems. He was the invited co-editor of a special issue of the Analog Integrated Circuits and Signal Processing journal devoted to current-mode circuit techniques, and a special issue of the International Journal on Circuit Theory and Applications. He co-organized two special sessions related to on-chip power management at IEEE ISCAS03 (Bangkok, Thailand) and IEEE ISCAS06 (Kobe, Japan) and a tutorial at IEEE ISCAS09 (Taipei, Taiwan). He was the 2007 Chair of the IEEE Circuits and Systems Society Technical Committee of Power Systems and Power Electronics Circuits. He was the technical program co-chair of the 2007 European Conference on Circuit Theory and Design - ECCTD07 (Seville, Spain), track chair of the IEEE ISCAS 2007 (New Orleans, US), IEEE MWSCAS07 (Montreal, Canada), IEEE ISCAS 2008 (Seattle, US), ECCTD?9 (Antalya, Turkey) and IEEE MWSCAS09 (Cancun, Mexico). He served as an Associate Editor of the IEEE Transactions on Circuits and Systems - II: Express briefs (2006-2007) and currently serves as Associate Editor of the Transactions on Circuits and Systems - I: Regular papers (2006-2009).

September 21, 2009: Joint meeting with SCV-ComSoc, SCV-MTT & SCV-SPS "Low-Voltage Oversampling Analog-to-Digital Conversion" by Dr. Bruce A. Wooley, Robert L. and Audrey S. Hancock Professor of Engineering, Stanford University

Abstract: Through the exchange of resolution in time for that in amplitude, oversampling methods are now widely used to enable the realization of high-resolution analog-to-digital converters in scaled CMOS VLSI technologies. So-called oversampling modulators combine coarse quantization at sampling rates well above the Nyquist rate with feedback and subsequent digital signal processing to avoid the need for precision analog circuits. Such modulators were originally conceived in the mid-twentieth century in the form of delta modulators, which digitize the rate of change of a signal, rather than the signal itself. However, noise-shaping modulators that directly encode the signal proved to be a more robust approach and have subsequently come into widespread use. In particular, cascades of inherently stable sigma-delta (or, equivalently, delta-sigma) modulators are an efficient means of extending the dynamic range of oversampling converters that are largely immune to both analog circuit imperfections and fundamental stability concerns. This presentation begins with an overview both architectural and circuit issues associated with the design of noise-shaping modulators, and then presents examples of some approaches to their implementation under increasingly severe constraints on power dissipation and supply voltage.

Bio: Bruce A. Wooley is the Robert L. and Audrey S. Hancock Professor of Engineering at Stanford University. He received the B.S., M.S. and Ph.D. degrees in Electrical Engineering from the University of California, Berkeley in 1966, 1968 and 1970, respectively. From 1970 to 1984 he was a member of the research staff at Bell Laboratories in Holmdel, NJ, and he joined the faculty at Stanford in 1984. At Stanford he has served as the Chair of the Department of Electrical Engineering, the Senior Associate Dean of Engineering and the Director of the Integrated Circuits Laboratory. His research is in the field of integrated circuit design, where his interests include low-power mixed-signal circuit design, oversampling A/D and D/A conversion, circuit design techniques for video and image data acquisition, high-speed embedded memory, noise in mixed-signal integrated circuits, and circuits for wireless and wireline communications.

Prof. Wooley is a Fellow of the IEEE and a past President of the IEEE Solid-State Circuits Society. He has served as the Editor of the IEEE Journal of Solid-State Circuits and as the Chairman of both the International Solid-State Circuits Conference (ISSCC) and the Symposium on VLSI Circuits. Among the awards he has received are the University Medal from the University of California, Berkeley, the IEEE Journal of Solid-State Circuits Best Paper Award, recognition for his Outstanding Contributions to the Technical Papers of the International Solid-State Circuits Conference, the IEEE Third Millennium Medal, the Outstanding Alumnus Award from the EECS Department at the University of California, Berkeley, and the IEEE Solid-State Circuits Technical Field Award.

September 9, 2009, 2009: Joint meeting with SCV-CPMT "Molecular Modification of PCB Substrates for Fine Line Patterning" by Dr. Werner Kuhr, Founder and VP-Research, ZettaCore, Inc.

Abstract: ZettaCore has developed a new Molecular Interface technology, where a molecular adhesion layer is created for smooth epoxy substrates to allow the electroless deposition and electroplating of copper onto unroughened epoxy surfaces. Molecules are attached to smooth PCB substrates via a thermally-induced reaction of the molecular species with the substrate surface, after which the high affinity of the molecule-modified surface for metal ions facilitates electroless plating of the copper, which is then used as a seed layer to electroplate larger quantities of copper utilizing conventional processes. This process allowed the fabrication of PCB substrates with fine line patterning of the metal layers (e.g., 20/20, 18/18, 14/14, 12/12 microns and 8/8 microns) using only a slight modification of standard lithographic processes using the semi-additive patterning process. Good stability to HAST and other accelerated stress tests were obtained on all of these structures, indicating that treatment with the molecular adhesion process significantly improved the ability to pattern copper lines at fine line spacing. Similar results were obtained using an analogous process for the lamination of epoxy prepreg onto smooth copper surfaces.

Bio: Werner G. Kuhr is currently Founder and Vice President of Research, ZettaCore, Inc. which supplies molecular electronic solutions to the semiconductor and microelectronics market. Previously, he was a professor of chemistry at the University of California, Riverside, where his research was focused on the development of nano-scale techniques for the design and characterization of electrochemical devices. Professor Kuhr has published over 100 scientific papers, delivered over 100 invited lectures at conferences and universities across the world, and been issued twenty-eight U.S. and international patents. He earned B.S. and M.S. degrees in Chemistry from Stevens Institute of Technology (1980-82) and earned his Ph.D. in Chemistry from Indiana University (1986). He is currently serving on the board of advisors of the College of Natural and Agricultural Sciences, University of California, Riverside. He has been the recipient of a number of awards including a Presidential Young Investigator Award from the National Science Foundation (1989); a Young Investigator Award from the Society of Electroanalytical Chemistry (1993) and the Jubilee Silver Medal from the Chromatographic Society, England (1994).

July 14, 2009: Joint meeting with SCV-EDS "Wireless Autonomous Transducer Solutions for Healthcare Applications" by Dr. Sywert Brongersma, Principal Researcher, IMEC, Belgium

Abstract: Wireless sensor and actuator systems monitor physical or environmental conditions and are able to initiate an appropriate response to external stimuli if so required. They are indispensable for a wide range of commercial and industrial applications that would be difficult or more expensive to realize using wired systems. Their unique characteristics include small-scale, limited power consumption (<100mW) and complex algorithms that are implemented in the sensor nodes. In contrast, existing systems typically make use of bulky macro sensors and actuators that consume several 100mW of power.

In 2005, IMEC co-initiated the Holst Centre in Eindhoven, The Netherlands. Here they now run their program line on 'Wireless Autonomous Transducer Solutions' whilst looking for synergies with a program on 'Systems in Foil' that was initiated by the Dutch TNO. IMEC's activities at Holst Centre encompass the full range of technologies required for enabling miniaturized autonomous systems. This starts with harvesting energy from the environment in order to provide the energy required by the system from e.g. thermal differences, motion, and solar energy. This energy is then used for interaction with the outside world (sensing and actuating), signal conditioning and conversion (both analog to digital and DC-DC), digital signal processing and communication. Reducing power consumption of such a system also includes basic trade-off considerations between local processing and communication data rates.

To show functionality of the various technologies, demonstrators are built that presently focused on healthcare applications (although opportunities in other application areas are being explored). This is part of a wider IMEC effort in this area, helping to develop technologies that will make healthcare more cost efficient by using wireless technologies for delivery of care. Present examples include sleep staging and emotion monitoring using a generic platform on which new sensors can be implemented. These are being developed in parallel, with focus on sensing of gasses based on a wide range of transducer principles. The objective is to reduce power consumption of existing principles by e.g. eliminating the need for elevated temperatures whilst maintaining or improving selectivity and sensitivity. Because of the low power requirement, novel concepts and micro/nano-fabrication techniques are essential and a cornerstone of this activity that ranges from nanowire based FETs to MEMS based systems.

Bio: Dr. Sywert H. Brongersma studied applied Physics at the Technical University of Eindhoven. He graduated in 1991 on thin film deposition using laser ablation at the Philips NatLab in Eindhoven and obtained his Ph.D. at the Free University of Amsterdam in the field of superconductivity.

After a postdoc at the University of Western Ontario (Canada) he joined IMEC's Advanced Silicon Processing division in 1998. Here, he became a principal scientist for both the Cu/Low-k back-end-of-line integration and the Post-CMOS nano-technology affiliation programs. In November 2006, he transferred to IMEC's new site in Eindhoven that is part of the Holst Centre. At present, he is principal researcher for the wireless autonomous transducer solutions program and managing the sensors & actuators activity.

June 15, 2009: "Renewable Energy" by Dr. William Kao, University of California, Clean Technology Institute

Abstract: In his inaugural address on January 20 this year, President Barack Obama re-affirmed his new Administration's commitment to address climate change through additional development of renewable energy. A key passage of the speech reads: 'We will harness the sun and the winds and the soil to fuel our cars and run our factories.'

The plan is to invest in alternative and renewable energy, reduce demand for foreign oil, address climate change and create millions of new jobs. The Obama 'New Energy for America plan' aims to help create five million new jobs by strategically investing US $150 billion over the next decade, ensure 10% of US electricity comes from renewable sources by 2012, and 25% by 2025 and implement an economy-wide cap-and-trade scheme to reduce greenhouse gas emissions 80% by 2050.

This talk will cover the fundamentals, individual opportunities, challenges and limitations of each of the seven major clean, renewable energies: solar, wind, hydro, biomass, ocean (tidal, and wave), and geothermal.

Some topics covered will be concentrating solar power systems, thin film solar PV cells, biomass and biofuels, wind turbines, hydroelectric power, ocean thermal energy and ocean mechanical energy from tides and waves, and geothermal heat and electricity.

The talk will also cover briefly the global emission's Kyoto Protocol, and the California Solar Initiative.

Bio: Dr. William Kao has been working in the Semiconductor and Electronic Design Automation industries for 30 years. He has a BSEE, MSEE and PhD from the University of Illinois Urbana-Champaign. He was an Adjunct Professor at UCLA Electrical Engineering Department where he taught courses in computer aided circuit design.

He is editor of the "Computer Communications Journals", the "ACM Transactions on Multimedia Computing", the "ComSoc Surveys & Tutorials" and the "IEEE Internet Computing Magazine", and a former editor of the "IEEE Transactions on Image Processing", "Journal of Communications and Networks" and "IEEE/ACM Transactions on Networking".

Dr. Kao held engineering and management positions at Texas Instruments, Xerox Corporation(11 years), Cadence Design Systems (17 years) , Arcadia Design and Magma Design Automation.

From 1989-2000 Dr. Kao was Group Director of R&D at Cadence Analog, Mixed Signal and Custom IC group. He was VP of Engineering at Arcadia Design, and VP of Design Services and Operations at Magma Design Automation in 2000.

From 2001 till February of 2008, he was Group Director of R&D at Cadence IC Digital Group responsible for the Silicon Encounter and Silicon Ensemble product lines.

Dr. Kao has authored more than 40 technical papers at major conferences in the areas of circuit simulation, place and route, mixed signal test, design methodologies, and mixed signal design.

Dr. Kao is a Senior member of IEEE. He was also Associate Editor of IEEE Transactions on Circuits and Systems, a member of CAS Technical Committee on Analog Signal Processing. In 2006 he was Chair of the Circuits and Systems Chapter in Silicon Valley.

Dr. Kao currently teaches Renewable Energy and Business Sustainability at the Clean Technology Institute and University of California Silicon Valley extension. He is also on the Technical Advisory Board for Sigma Quest on the topics of Energy and Environment, and Quality Control and is an Energy Consultant for various companies and investment firms.

June 10, 2009: Joint meeting with SCV-ComSoc "VoIP for Wireless" by Dr. Henning Schulzrinne, Columbia University, IEEE ComSoc Distinguished Lecturer

Abstract: IEEE 802.11-based networks are likely to become popular as replacements for cordless phones, particularly in enterprise settings, and as a way to fill in cellular coverage inside buildings and homes. However, using 802.11a/b/g for VoIP poses a number of challenges, including how to make hand-offs transparent, how to maximize capacity and how to limit the number of concurrent calls to avoid quality degradation. In the IRT Lab at Columbia University, we have proposed and investigated a number of techniques that address these issues. In addition, measurements of 802.11 networks illustrate some of the operational and modeling challenges.

This is joint work with Ashutosh Dutta, Andrea Forte, Sangho Shin and Kenta Yasukawa.

Bio: Prof. Henning Schulzrinne received his undergraduate degree in economics and electrical engineering from the Darmstadt University of Technology, Germany, his MSEE degree as a Fulbright scholar from the University of Cincinnati, Ohio and his Ph.D. degree from the University of Massachusetts in Amherst, Massachusetts. He was a member of technical staff at AT&T Bell Laboratories, Murray Hill and an associate department head at GMD-Fokus (Berlin), before joining the Computer Science and Electrical Engineering departments at Columbia University, New York. He is currently chair of the Department of Computer Science.

He is editor of the "Computer Communications Journals", the "ACM Transactions on Multimedia Computing", the "ComSoc Surveys & Tutorials" and the "IEEE Internet Computing Magazine", and a former editor of the "IEEE Transactions on Image Processing", "Journal of Communications and Networks" and "IEEE/ACM Transactions on Networking".

He has been a member of the Board of Governors of the IEEE Communications Society and is vice chair of ACM SIGCOMM, former chair of the IEEE Communications Society Technical Committees on Computer Communications and the Internet and has been technical program chair of Global Internet, IEEE Infocom, NOSSDAV, IM, IFIP Networking 2009 and IPtel and General Co-Chair of ACM Multimedia 2004 and ICNP 2009. He serves on the Internet2 Applications, Middleware and Services Advisory Council and as working group chair in the NSF GENI project. He also has been a member of the IAB (Internet Architecture Board). He serves on a number of conference and journal steering committees, including for the IEEE/ACM Transactions on Networking.

Protocols co-developed by him, such as RTP, RTSP and SIP, are now Internet standards, used by almost all Internet telephony and multimedia applications. His research interests include Internet multimedia systems, quality of service, and performance evaluation.

He served as Chief Scientist for FirstHand Technologies and Chief Scientific Advisor for Ubiquity Software Corporation. He is a Fellow of the IEEE, has received the New York City Mayor's Award for Excellence in Science and Technology, the VON Pioneer Award and the TCCC service award.

June 4, 2009: Joint meeting with Monterey Bay Subsection "Electric: a Multithreaded Integrated-Circuit Design System" by Dr. Steven M. Rubin

Abstract: The Electric VLSI Design System is an open-source circuit-design system that has been used for decades to make integrated circuit (IC) chips. Written in 1982, it predates most commercial circuit design systems available today. Beginning in 2003, a small team at Sun Microsystems translated Electric from C to Java, completing the task in less than two years. The resulting system is more stable, has an improved user interface, and (to the surprise of many) is faster.

One of the reasons for the new translation was to take advantage of Java's powerful multithreading facilities. While attempting to make use of these facilities, it was determined that a thread-safe database was needed. We split the system into a database server and a user-interface client. This new database has a number of advantages, including: collaborative design, thin-client design terminals, reliable crash recovery, reduced memory usage, and the ability to use multiple processors.

This talk describes these improvements to Electric and describes two multithreading facilities that have been built: a design-rule checker (DRC) and a wire router.

Bio: Steven M. Rubin is the author of the Electric VLSI Design System, and the CAD tools textbook "Computer Aids for VLSI Design." He received his doctorate at Carnegie Mellon University and has done research at Bell Labs, Schlumberger, Apple Computer, Interval Research, and Sun Microsystems. Specializing in visually-oriented computing, his research has spanned computer vision, graphics, and CAD. Steve was also the lead singer of Severe Tire Damage, the first band to perform live on the Internet.
For more on Steve, see www.rulabinsky.com/steve
For more on Electric, see www.staticfreesoft.com

May 18, 2009: "Advanced MEMs-based displays for portable applications" by Mr. Alan Lewis, Sr. Dir. of Engineering, QUALCOMM MEMS Technologies

Abstract: This talk will focus on mirasol™ display technology for battery-operated portable devices such as cell phones, GPS systems, MP3 players, PDAs etc. The key display requirements for such systems include low power for extended battery life, readability in widely differing ambients (direct sunlight to dim indoor lighting) and good image quality for both static and video images. Qualcomm's mirasol™ Technology, based on Interference Modulation devices (IMODs), is ideally suited to meet these requirements.

Conventional active matrix LCDs, currently the dominant display technology for portable devices, suffer a number of drawbacks. Typically, the displays are backlit, giving good image quality under most indoor lighting conditions, but rendering them all but unreadable in sunlight. The backlight also consumes significant power, reducing battery life significantly. Mirasol™ displays, on the other hand, offer excellent reflective characteristics, making them easily readable under both outdoor and indoor conditions, are inherently bistable and able to hold images without refreshing, making them very low power, and have the response speed necessary for rendering video.

Another advantage of mirasol™ technology lies in the relative simplicity of the structure. A single IMOD device provides light modulation, color selection and pixel-level memory — the three key operations necessary in an electronic display. By contrast, a TFT-LCD requires three separate structures (the LC cell, color filters and the TFT/storage capacitor backplane) to perform these functions.

The basic structure and operation of an IMOD device will be explained along with the application to displays. The benefits offered by mirasol™ technology for portable devices is exemplified by recent product commercialization, making clear the potential advantages for users, service providers and equipment manufacturers. Examples of mirasol™ displays will be shown.

Bio: Alan Lewis is director of engineering for the Qualcomm MEMS Technologies (QMT). He has more than 25 years of experience in advanced technology development for flat panel displays, semiconductor lasers, silicon integrated circuits and image sensors.

Mr Lewis has published over 120 technical papers and is a fellow of the IEEE. He has served on the organizing committees of the IEDM, ISSCC and the SID International Symposium.

May 13, 2009: Joint meeting with SCV-CMPT, SCV-EDS and SCV-Rel "Through-Silicon Vias (TSVs): Design and Reliability" by Dr. Sergey Savastiouk, ALLVIA, Inc

Abstract: Thinned wafers with through-silicon isolated metal vias (TSVs) open a valuable new design opportunity for both IC and package engineers. Through-silicon metal connectivity enables electrical and thermal performance advantages, back-side connectivity for two-sided semiconductor wafer and chip-level testing, as well as vertical interconnections for 3D IC stacking and micro- and opto-electronics. The benefit of IC vertical interconnects such as TSVs has been presented in many papers. The term TSV was introduced by the presenter in 1996 and published in 2000. However, the physical design and reliability issues associated with copper through-silicon vias have not been fully resolved. The following problems present process challenges: metal voiding during filling, uniform via wall material deposition, and active IC surface connectivity to name a few. Copper vias fabricated in a silicon wafer impose, at high temperatures, tensile stresses in silicon. The situation might be aggravated by the stress fields due to numerous vias and, if the vias are placed too close to each other, the thermally induced stresses might lead to cracking of the silicon wafer. In addition, the vias experience compressive 'hoop' stresses. These stresses could lead to the via buckling. The presentation will address other design and reliability issues.

Bio: Sergey Savastiouk, Ph.D. is the founder and CEO of ALLVIA, Inc., the first TSV foundry. He received his Ph.D. in EE from Moscow University and began his career as a Professor at Santa Clara University in 1993. After completing his MBA program in 1997, he founded Tru-Si Technologies, Inc., which pioneered ultra-thin (50um) wafer packaging equipment and through-silicon vias applications. Atmospheric Downstream Plasma (ADP) systems and NoTouch handling solutions have been used in production of smart cards and ultra-thin packages. In 1996, in the business plan for Tru-Si Technologies, he introduced the term "Through Silicon Vias (TSV)" which is now widely used in semiconductor and MEMS industries. He also published the term "TSV" in Solid State Magazine in January 2000. In 2004, he founded ALLVIA, Inc., a through-silicon via (TSV) specialty foundry, which has been commercializing its TSV capabilities for semiconductor, RF and MEMS industries. Dr. Savastiouk has authored numerous articles and received patents on TSV processes, equipment and applications.

April 20, 2009: "Hot Spot Management and Micro Refrigeration in Integrated Circuits" by Dr. Ali Shakouri, UC-Santa Cruz

Abstract: Static and dynamic hot spots are one of the key factors limiting the performance and reliability of electronic devices and integrated circuits. Various simulation and characterization tools to predict and measure hot spots will be reviewed. We show that transient thermoreflectance imaging using CCD camera can be used to measure temperature distribution in chips with 0.1°C temperature, 100 nanosecond time and submicron spatial resolution. Examples from multi finger and high power transistor structures are presented. We also introduce power blurring technique which can be used to obtain transient temperature profile in packaged IC chips with calculation times orders of magnitude faster than finite element analysis. Finally, we review solid-state microrefrigerators on a chip. SiGe alloy and superlattice thin films have demonstrated localized cooling by 7°C at 100°C ambient temperature. Novel nanocomposites are developed where the heat and charge transport are modified at the atomic level. Potential to remove hot spots with power densities exceeding 1-2kW/cm2 will be discussed.

Bio: Ali Shakouri is professor of electrical engineering at University of California Santa Cruz. He received his Ph.D. from California Institute of Technology in 1995. His current research is on nanoscale heat and current transport in semiconductor devices, high resolution thermal imaging, micro refrigerators on a chip and waste heat recovery. He is also working on a new sustainability curriculum in collaboration with colleagues in engineering and social sciences. He has initiated an international summer school on renewable energies sources in practice. He is the director of the Thermionic Energy Conversion center, a multi university research initiative aiming to improve direct thermal to electric energy conversion technologies. He received the Packard Fellowship in Science and Engineering in 1999, the NSF Career award in 2000 and UCSC School of Engineering FIRST Professor Award in 2004.

March 24-25, 2009: "2009 IEEE Workshop on Silicon Errors in Logic - System Effects (SELSE 2009)" Stanford University

Abstract: The growing complexity and shrinking geometries of modern device technologies are making these high-density, low-voltage devices increasingly susceptible to influences from electrical noise, process variation, and natural radiation interference. System-level effects of these errors can be far reaching. Growing concern about intermittent errors, erratic storage cells, and the effects of aging are influencing system design. This workshop provides a forum for discussing current research and practices in system-level error management. Participants from industry and academia explore both current technologies and future research direction (including nanotechnology). We are interested in soliciting papers that cover system-level effects of errors from a variety of perspectives: architectural, logical and circuit-level, and semiconductor processes. Case studies are also solicited.

Key areas of interest are (but not limited to):

March 2, 2009: "The Multi-Dimensional Design Space of Power, Reliability, Temperature and Voltage in Highly Scaled Geometries" by Dr. Fadi Kurdahi, UC-Irvine

Abstract: Increased operating temperatures of chips have aggravated leakage and reliability issues, both of which are adversely affected by high temperature. Due to thermal diffusion among IP-blocks and the interdependence of temperature and leakage power, we observe that the floor-plan has an impact on both the temperatures and the leakage of the IP-blocks in a System on Chip (SoC). An increase in temperature also increases the probability of errors such as read/write errors or unstable memory accesses. We show that contrary to conventional wisdom, increasing the supply voltage on an SRAM to guarantee stability, might lead to the exact opposite by increasing the probability of error due to temperate increase. Thus supply voltage, power, temperature, and probability of errors influence each other mutually and must be considered during robust circuit design. We will discuss approaches for fast and efficient design space exploration that account for dynamic and leakage power as well as the impact of voltage scaling, floor-planning and temperature gradients across the system on a chip. Furthermore, we will present recent results obtained from applying our floor-planner on eight industrial SoC designs from Freescale Semiconductor Inc. where we observed up to 135% difference in the leakage power between leakage-unaware and leakage aware floor-planning. We will also demonstrate designs where thermal aware floor planning can reduce the total power dissipation by up to 50%.

Bio: Fadi Kurdahi received his PhD from the University of Southern California in 1987. Since then, he has been a faculty at the Department of Electrical & Computer Engineering at UCI, where he conducts research in the areas of Computer Aided Design of VLSI circuits, highlevel synthesis, and design methodology of large scale systems, and serves as the Associate Director for the Center for Embedded Computer Systems (CECS). He was Associate Editor for IEEE Transactions on Circuits and Systems II 1993-1995, Area Editor in IEEE Design and Test for reconfigurable computing, and served as program chair, general chair or on program committees of several workshops, symposia and conferences in the area of CAD, VLSI, and system design. He received the best paper award for the IEEE Transactions on VLSI in 2002, the best paper award in 2006 at ISQED, and three other distinguished paper awards at DAC, EuroDAC and ASP-DAC. He also received the Distinguished Alumnus award from this Alma Mater, the American University of Beirut in 2008. He is a Fellow of the IEEE and the AAAS.

February 11, 2009: Joint meeting with SCV-CPMT, SCV-EDS and SCV-Nano "The Basic Electronic Components: Finding the Missing Memristor" by Dr. Stanley Williams, HP Laboratories

Abstract: The existence of a fourth passive circuit element was proposed by Prof. Leon Chua of UC Berkeley in 1971 from fundamental symmetry arguments unifying resistance, inductance and capacitance equations. Although he showed that such a 'memristor' had many interesting and useful circuit properties, until this year no one had presented a physical model nor material example of such an element. In fact, memristance arises naturally in systems for which electronic and atomic transport are coupled under an external bias voltage. A simple analytical model shows that the nonlinear term that determines the magnitude of memristance is inversely proportional to the square of the thickness of the active device, and demonstrates that such nonlinear behavior is much more important and prevalent for electronic devices with nanoscale dimensions. These results serve as the foundation for understanding a wide range of hysteretic current-voltage behavior observed over the past 50 years in many electronic devices that involve the motion of atoms, vacancies or molecular components. We have built nanoscale titanium dioxide memristors in our laboratory and have demonstrated many of their electrical properties and potential uses, including new forms of logic circuits. These devices can rather easily be integrated into electronic circuits using conventional materials available in standard CMOS fabrication facilities.

Bio: Stanley Williams is an HP Senior Fellow at Hewlett-Packard Laboratories and Director of the Information and Quantum Systems Laboratory (IQSL), which currently has over 80 scientists and engineers working in areas of fundamental physical sciences and engineering. There are four active HP Senior Fellows out of a total technical staff of 40,000 in Hewlett-Packard Company. He received a B.A. degree in Chemical Physics in 1974 from Rice University and his Ph.D. in Physical Chemistry from U. C. Berkeley in 1978. He was a Member of Technical Staff at AT&T Bell Labs from 1978-80 and a faculty member (Assistant, Associate and Full Professor) of the Chemistry Department at UCLA from 1980-1995. He joined HP Labs in 1995 to found the Quantum Science Research group, which focused primarily on fundamental research at the nanometer scale. His primary scientific research during the past thirty years has been in the areas of solid-state chemistry and physics, and their applications to technology. This has evolved into the areas of nanostructures and chemically-assembled materials, with an emphasis on the thermodynamics of size and shape. Most recently, he has examined the fundamental limits of information and computing, which has led to his current research in nano-electronics, -ionics, -mechanics and -photonics. In 2008, a team of researchers he led announced that they had built and demonstrated a memristor, the fourth and final fundamental electronic circuit element, complementing and completing the capacitor, resistor and inductor. He has received awards for business, scientific and academic achievement, including the 2007 Glenn T. Seaborg Medal for contributions to Chemistry, the 2004 Joel Birnbaum Prize (the highest internal HP award for research), the 2004 Herman Bloch Medal for Industrial Research, the 2000 Julius Springer Award for Applied Physics, the 2000 Feynman Prize in Nanotechnology, the Dreyfus Teacher-Scholar Award and the Sloan Foundation Fellowship. He was named to the inaugural Scientific American 50 Top Technology leaders in 2002 (and then again in 2005). In 2005, the US patent collection that he has assembled at HP was named the world's top nanotechnology intellectual property portfolio by Small Times magazine, and the Chinese Academy of Science voted the crossbar latch invented in his lab as the third most significant scientific breakthrough of the year (behind the Cassini and Deep Impact space missions). He was a co-organizer and co-editor (with Paul Alivisatos and Mike Roco) of the workshop and book "Vision for Nanotechnology in the 21st Century", respectively, that led to the establishment of the U. S. National Nanotechnology Initiative in 2000. He has been awarded 77 US patents with more than forty pending, he has published over 300 papers in reviewed scientific journals (with an h-index of 48), and he has written several general articles for technical, business and popular publications (including an article in the Nov. 2005 issue of Scientific American). One of his patents was named as one of five that will "transform business and technology" by MIT's Technology Review in 2000. He has presented hundreds of invited plenary, keynote and named lectures at international scientific, technical and business events, including one of the 2007 50th Anniversary Laureate Lectures for the TMS, the 2003 Joseph Franklin Lecture at Rice University, the 2004 Debye Lectures at Cornell University, the 2004 Bloch Lecture at the University of Chicago, and the 2005 Carreker Engineering Lecture at Georgia Tech.

January 26, 2009: Joint meeting with SCV-EMBS and SCV-ComSoc "Microwatt Design for Energy Harvesting Sensors" by Dr. Rajeevan Amirtharajah, UC-Davis

Abstract: For wireless sensor networks and implantable biomedical sensing devices, power consumption is a critical factor in determining system volume, operating lifetime, and circuit performance. Scavenging energy can extend sensor lifetimes beyond battery limitations, but the available energy is highly variable. In this talk, we present an overview of designing energy harvesting sensor systems. First, we discuss transducers for multiple energy harvesting modalities such as solar and mechanical vibration. We next discuss flexible circuits and architectures which can scale power consumption with available energy to address the variability issue. These include self-timing techniques to radically simplify power electronics, area-efficient bit-serial word-parallel computation structures, and mixed-signal circuits using passive filters. New nanoscale materials such as carbon nanotubes and semiconductor nanowires could potentially usher in a new era in chemical detection for environmental, biomedical, and security applications by providing highly sensitive detection at low cost and low power. We conclude by describing potential applications of nanowire-based devices for low power sensors.

Bio: Rajeevan Amirtharajah received the S.B. and M.Eng. degrees in 1994, and the Ph.D. degree in 1999, all in electrical engineering from the Massachusetts Institute of Technology, Cambridge, MA. His doctoral work developed micropower DSP systems which scavenge energy from mechanical vibrations in their environment and use that energy to process information provided by embedded and wearable sensors. From 1999 to 2002, as a senior member of the technical staff at High Speed Solutions Corp., Hudson, MA, later a subsidiary of Intel Corporation, he helped create innovative high performance multidrop bus technologies using electromagnetic coupling and pulse-based modulated signaling. He worked as an ASIC and mixed-signal circuit design consultant at SMaL Camera Technologies, Cambridge, MA, in 2003.

In July 2003, he joined the Electrical and Computer Engineering department at the University of California, Davis, where he is currently an associate professor. His research interests include low power VLSI design for sensor applications, powering systems from ambient energy sources, and high performance circuit and interconnect design. He received the National Science Foundation CAREER award in 2006. He is an inventor on twenty United States patents and is a member of IEEE, AAAS, and Sigma Xi.