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Electron Devices Society
Santa Clara Valley Chapter http://www.ewh.ieee.org/r6/scv/eds/ |
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The field of interest of the IEEE EDS is all aspects of the physics, theory,
and phenomena of electron and ion devices, such as elemental and compound
semiconductor devices, quantum effect devices, optical devices, tubes and
other vacuum devices. Please Post and Circulate within your Company. |
September 1, 2006 |
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For an online version of this announcement with active links, please visit http://www.ewh.ieee.org/r6/scv/eds/announcements/ieee-scv-eds-20060901.html |
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September 12th Meeting
Albert Bergemont - Maxim on "Future and Limitations for Floating Gate NVM Manufacturing" |
September 26th Meeting
Kurt Stokbro - Copenhagen Univ. "Challenges in Modeling Nanoscale Devices" |
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Past non-IEEE Events
Stanford Campus Events |
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Upcoming IEEE SCV EDS Evening Meeting:
September 12, 2006 IEEE SCV EDS Meeting:
Abstract: Floating gate flash memory scaling has been phenomenal in the last 15 years. As a result, the overall flash memory market has grown at an unprecedented pace, mainly driven by exploding customer demand for mobile mass storage applications such as digital cameras, MP3 players, and cell phones. In such a large commodity market, the course for further flash memory cell scaling has led to tremendous R&D activity in the last few years with NAND density doubling almost every year. Although it is expected that flash memory cells will continue to scale, there are several physical limitations to confront, and scaling down beyond 45nm is a concern, especially for the floating gate memory architectures. |
Upcoming IEEE SCV EDS Evening Meeting:
Biography: Up to 1995, he was mainly involved with technology development of non-volatile technologies (stand-alone EEPROM, EPROM, FLASH) successively at Harris Semiconductor (first CMOS EEPROM, ahead of Intel), SGS-THOMSON Micro (several NVM platforms from 0.8µm down to 0.35µm) and National Semiconductor (first AMG EPROM with Boaz Eitan, and first contact-less NOR Virtual Ground Flash, using channel erase, ahead of all the other semiconductor industry players. From 1995 to 2000 at National Semiconductor, he also developed and transferred successfully to production three generations of core CMOS and mixed-mode modules down to 0.18µm. He invented and demonstrated ahead of all the industry the free P-channel OTP and MTP concepts, now widely used worldwide. He also developed with Carver Mead the first Active Pixel Sensor CMOS imager (0.18µm), while the rest of the world was still using CCDs. He joined Maxim Integrated Products in 2000, where he is currently the TR&D Executive Director. He is in charge of core analog CMOS/Bipolar/HV technology platforms which also feature embedded NVM (EEPROM and Flash). He has authored and co-authored around 50 technical papers. He currently holds 181 patents with a few more pending at Maxim. For more information on Albert Bergemont |
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Upcoming IEEE SCV EDS Evening Meeting:
September 26, 2006 IEEE SCV EDS Meeting:
Abstract: In the first part, I will give an introduction to the field of quantum transport, and describe how the quantum nature of electrons changes the properties of nanoscale devices and the challenges we face. The modelling of quantum transport is particularly difficult since the small scale requires that the quantum nature and the atomic details of the system be accurately described, while the size of the system often comprises millions of atoms. Some years ago we introduced the important notion of dividing a nanoscale device into an active device region and a passive electrode region [1]. In this way, the simulation can often be limited to describing a few hundred atoms, and it is possible to calculate the current-voltage characteristics of the device with ab initio electronic structure techniques [1]. The scheme for ab initio calculation of quantum transport, developed by Dr. Stokbro and his co-workers, has become the de facto standard for electron transport calculations, and has laid the foundation for the company Atomistix A/S. In the second part of the talk, I will tell the story behind Atomistix, the theory behind their software products, and some insight gained on using their software to model the electrical properties of nanoscale devices like carbon nanotubes[1], 1-D graphene sheets, molecular electronic devices[2], atomic wires[3], spintronics components or interfaces between different materials[4].
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Upcoming IEEE SCV EDS Evening Meeting:
Abstract (Continued):
References:
Biography: He is coordinating a number of EU and Danish-funded R&D projects, with a total budget of more than 3 Million Euros. Dr. Stokbro has published more than 50 papers and review articles in international journals, held a large number of lectures as an invited speaker, and has organized three international conferences in nanoscience. For more information on Associate Professor Kurt Stokbro For more information on Atomistix A/S |
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