
	Electron Devices Society Santa Clara Valley Chapter http://www.ewh.ieee.org/r6/scv/eds/


The field of interest of the IEEE EDS is all aspects of the physics, theory, and phenomena of electron and ion devices, such as elemental and compound semiconductor devices, quantum effect devices, optical devices, tubes and other vacuum devices. Please Post and Circulate within your Company.	March 1, 2007
For an online version of this announcement with active links, please visit http://www.ewh.ieee.org/r6/scv/eds/announcements/ieee-scv-eds-20070301.html

March 12th Meeting
Alan K. Allan - SEMATECH
"2006 ITRS Overview - The Final Edition"

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Upcoming IEEE SCV EDS Evening Meeting:

Monday, March 12, 2007 IEEE SCV EDS Meeting:

"2006 ITRS Overview - The Final Edition"

Speaker: Alan K. Allan - SEMATECH
Subject: "2006 ITRS Overview - The Final Edition"
Location: National Semiconductor Building E Auditorium,
2900 Semiconductor Drive, Santa Clara, CA 95051.
See the NSC Campus driving directions
and the NSC Building E location map
Time: 6:00 PM - Pizza , 6:15 PM - Lecture
Speaker Contact: David Angst

Abstract:

An overview of the latest version of the International Technology Roadmap for Semiconductors (ITRS) which was completed in December, 2006 will be given in this talk.

In particular, the following items will be emphasized: the technology trend drivers contained in the 2005/2006 ITRS Executive Summary, selected manufacturing technology guidance issues, the Overall Roadmap Technology Characteristics (ORTC), the 300mm Prime wafer effort, and the upcoming 450mm wafer technology and manufacturing standards effort.

Key grand challenges and potential solutions from some of the 2006 ITRS Technology Working Groups will also be reviewed.

For more information on SEMATECH

For more information on the ITRS

For more information on the ITRS Related Sites of Interest

Upcoming IEEE SCV EDS Evening Meeting:

Biography:

Alan K. Allan is currently a Staff Engineer with the Intel Corporation and a SEMATECH assignee.

Alan obtained his BSEE in 1971 from the University of Colorado, Boulder, CO. He spent seven years at Motorola Semiconductor, followed by 27 years at the Intel Corporation.

His past responsibilities at the Intel Corporation include Design Engineer, Process Engineer, Applications Engineer, Product Market Engineer, Product Market Manager, Division Sales Training Manager, Corporate Market Research Council Member, SEMATECH assignee, and International SEMATECH/I300I assignee.

Alan is presently assigned as a Staff Engineer for the Intel Technology Manufacturing Group (TMG) External Programs to support the International Technology Roadmap for Semiconductors (ITRS) effort, the International National Electronics Manufacturing Initiative (iNEMI) Roadmap, the SRC FORCe II University Research Programs, and various SEMATECH Member and Supplier Industry Economic Model Projects.

Alan K. Allan has been an Intel Corporation assignee to SEMATECH since 1991. From 1991 to 1996, his SEMATECH work involved a competitive analysis of the United States semiconductor industry versus the rest of the world.

From 1996 to 1999, he worked on the I300I international consortium to develop the 200mm to 300mm transition plan. Since 1999, he has worked on the following International Semiconductor Manufacturing Initiative (ISMI) programs: the 300mm Prime wafer technology, manufacturing standards, and cost reduction efforts, the 450mm wafer technology and manufacturing standards effort, and various SEMATECH Member and Supplier economic affordability models.

Alan reports directly to Dr. Paolo Gargini, another Intel Corporation assignee to SEMATECH. Since 1998, Dr. Gargini has been the Chairman of the International Technology Roadmap for Semiconductors (ITRS).

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