
	Electron Devices Society Santa Clara Valley Chapter http://www.ewh.ieee.org/r6/scv/eds/


The field of interest of the IEEE EDS is all aspects of the physics, theory, and phenomena of electron and ion devices, such as elemental and compound semiconductor devices, quantum effect devices, optical devices, tubes and other vacuum devices. Please Post and Circulate within your Company.	October 17, 2007
For an online version of this announcement with active links, please visit http://www.ewh.ieee.org/r6/scv/eds/announcements/ieee-scv-eds-20071101.html

November 13th Meeting
Dan Hutcheson, VLSI Research Inc
"450mm Wafers: What will it cost to get there?"

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Upcoming IEEE SCV EDS Evening Meeting:

Tuesday, November 13, 2007IEEE SCV EDS Meeting:

"450mm Wafers: What will it cost to get there?"

Speaker: Dan Hutcheson, VLSI Research Inc
Subject: "450mm Wafers: What will it cost to get there"
Location: National Semiconductor Building E Auditorium,
2900 Semiconductor Drive, Santa Clara, CA 95051.
See the NSC Campus driving directions
and the NSC Building E location map
Time: 6:00 PM - Pizza , 6:15 PM - Lecture
Speaker Contact: J. Prasad

Abstract:

Tensions are high as the industry confronts the issue of 450mm. Some believe it is absolutely necessary. It was scheduled in the ITRS roadmap to be ready by 2012 and believed essential to keep chip makers on Moore's cost/performance curve. Now it's been pushed out to 2015. Meanwhile, with 300mm just past the toddler stage, others believe 450mm will be a disaster and are fighting tooth and nail behind the scenes to stop it. Today, they represent the majority. It's not just the equipment makers who are in this camp. It is also the majority of chip makers. Many believe Moore's law must slow; that staying on it is unaffordable; that 450mm will lead to even worse scale problems than 300mm; and that if it happens the result will be more consolidation and even harder times.

In favor of the people arguing for it is the fact that every wafer size jump has met with resistance based on the same reasoning. But there are reasons to believe that this time things will be different. The industry's growth has slowed. Plus, 300mm proved to be incredibly painful for the equipment industry. Few argue with these differences.

This talk delves deeply into the history of wafer size transitions, examining their costs and benefits. It then examines alternative scenarios for 450mm. It is based on Dan's Chip Insider® articles.

Upcoming IEEE SCV EDS Evening Meeting:

Biography:

Dan Hutcheson is CEO of VLSI Research Inc. He is a recognized authority and well-known visionary for the semiconductor industry whose career experience spans more than twenty years. Today Dan spends the majority of his time advising companies in strategic and tactical marketing; business management; and manufacturing trends, productivity, and strategy.

During his career, Dan has authored numerous publications, developed many industry models, and researched most aspects of the semiconductor industry. Dan is probably best known for being the first to forecast an industry recession and for having developed the industry's first cost-of-ownership model in the early eighties. He also built the first factory cost-optimization model in 1984. Similar models are now the mainstay of capital decision-making.

Dan holds a master's degree in Economics from San Jose State University and has completed additional engineering coursework from UC Berkeley.

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