Upcoming IEEE SCV EDS Evening Meeting:
Tuesday, April 14, 2009
"Charge and surface potential based MOSFET models, what are the differences?
"
Speaker: Dr. Carlos Galup-Montoro, UC Berkeley
Location: National Semiconductor, Building E1, Conference Center,
2900 Semiconductor Drive, Santa Clara, CA 95051.
See the NSC Campus driving directions
and the NSC Building E location map
Time: 6:00 PM - Pizza , 6:15 PM - Lecture
Speaker Contact:
Samar Saha
Abstract:
To overcome the limitations of VT-based MOSFET models, a new class of
models emerged, namely inversion charge-based and surface
potential-based models.
Compact model developers have emphasized the differences between
modeling approaches, particularly those related to the choice of a key
variable (or parameter) in the model. The virtues (and defects) of the
threshold voltage (VT)-based, surface potential and inversion charge
based models have been extensively discussed. In this seminar we adopt
another point of view; we emphasize not a particular variable but the
different simplifications employed to derive the compact equations. In
fact, most of the compact models for the MOSFET are based on the same
main approximations: gradual-channel, charge-sheet, and bulk (body)
charge linearization. The only difference between them is related to
the details in the simplifications applied to the different equations.
In this talk, the surface-potential and the charge-control models of
the MOSFET are compared both theoretically and numerically and it is
explained how to extract the main parameters for the charge-based
model from simulation results obtained with the surface potential
model.
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Upcoming IEEE SCV EDS Evening Meeting:
Biography:
Carlos Galup-Montoro studied engineering sciences at the University of
the Republic, Montevideo, Uruguay, and electronic engineering at the
National Polytechnic School of Grenoble (INPG), France. He received an
engineering degree in electronics in 1979 and a doctorate degree in
1982, both from INPG.
From 1982 to 1989 he was with the University of São Paulo, Brazil,
where he was engaged in junction field effect transistor (JFET)
fabrication and analog circuit design. Since 1990, he has been with
the Electrical Engineering Department, Federal University of Santa
Catarina, Florianópolis, Brazil where he is now a professor. From
August 1997 to February 1998 he was a research associate with the
Analog Mixed Signal Group, Texas A&M University. Currently he is on
leave at UC Berkeley. His main research interests and expertise are in
field effect transistor modeling and transistor-level design.
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