IEEE Santa Clara Valley 
Solid State Circuits Society



Past Event

Abstract

This presentation is based on the speaker’s Ph.D. dissertation which focuses on the design of a pulse-based ultra-wideband (UWB) transmitter. The transmitter consists of a pulse generator, a phase-locked loop (PLL) and modulation circuitry. The novel pulse generator employs FIR filtering so that the transmitted signal is compliant with the indoor FCC spectral mask. The frequency-multiplying PLL is designed to provide an accurate timing reference. Implemented in a 90 nm standard digital CMOS process, the prototype transmitter achieves a maximum pulse rate of 1.8 Gpulses/s. The 2.83 mm2 chip consumes 227 mW from a 1 V supply and includes everything but the antenna.

Because the antenna is a critical part of the system that produces the final transmitted signal, a general method is presented for the modeling of arbitrary ultra-wideband antennas directly in RF circuit simulators in order to enable simulations of circuit performance with the antennas included. The antenna modeling approach is based on S-parameter measurements, which are conducted in an anechoic chamber. Since the FCC uses the EIRP to assess compliance with their regulations, being able to accurately simulate its value is important. In addition, a procedure to model multipath channels in the circuit domain is presented. Since a voltage-controlled oscillator (VCO) is required for this project, the design of high-frequency, tunable VCOs was investigated. As a part of this investigation, VCOs with mutually coupled and switched inductors were implemented in a 90 nm digital CMOS process to demonstrate that the tuning range of an LC VCO can be improved with only a small increase in phase noise and die area. This work was done in collaboration with Stephen Bruss. One of the VCOs implemented has two extra coupled inductors and achieves a 61.9% tuning range with an 11.75 GHz center frequency while dissipating 7.7 mW from a 1.2 V supply. This VCO has a measured phase noise of -106 dBc/Hz at 1 MHz offset from the center frequency and its area is only 30% more than a conventional LC VCO with a single inductor.


Biography

Murat Demirkan received the B.S. degree in electrical and electronics engineering from METU University, Ankara, Turkey in 2001 and in 2004 he received the M.S. degree in electrical and computer engineering from the University of California, Davis where he is expected to receive the Ph.D. degree in March 2008. His research interests are in the areas of analog, mixed-signal and RF integrated-circuit design. During his time at the University of California, Davis, he has worked on projects involving ultra-wideband transceiver circuit design, RF frequency synthesizers and the modeling of ultra-wideband antennas. In January 2008, he joined Agilent Technologies, Santa Clara, CA, where he is engaged in the design of mixed-signal circuits for high-speed serial links. Mr. Demirkan received the Analog Devices Outstanding Student Designer Award in 2007. He was a co-recipient of the 2nd-place Best Student Paper Award at the 2007 IEEE Radio Frequency Integrated Circuits Symposium. He also received the Beatrice Winner Award for Editorial Excellence at the 2008 International Solid-State Circuits Conference.





SSC Technical meetings of SCV are typically held on The THIRD Thursday of each month at:

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Refreshments are provided at 6:00 PM and the talk typically starts at 6:30 PM.
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