May 15, 2003:
Our speaker was Mr. Boris Murmann , and the
topic of his presentation was
"Digitally assisted A/D conversion
- Trading off analog precision for computing power".
In the past decades, “Moore’s Law“ has governed the revolution in microelectronics. Through continuous advancements in fabrication technology and circuit architectures, the industry has been able to double performance benchmarks in purely digital applications every 18-24 months. At the same time, progress in the often unavoidable interface to “real world”, analog domain signals has followed a much slower trend. For A/D converters, one of the most relevant performance metrics - the speed-times-resolution product - has doubled roughly every 5 years.
As technology scaling continues, the rate of divergence between analog and digital performance metrics is expected to increase further. While system speed generally benefits from reduced feature sizes, the current onset of scaling related complications adversely affects the design of fast and precise analog circuits. In fine line technology, limited supply headroom and low intrinsic device gain make it increasingly hard to meet accuracy requirements in analog-to-digital conversion interfaces, leading to a potential reduction of their overall figure of merit.
This talk centers around recent efforts in using today’s advanced digital domain capabilities to overcome analog circuit limitations in A/D converters. The first part of this presentation will review past work and common approaches in digital error compensation. Next, the talk will elaborate on implementation details and measured results of a “digitally assisted”, 12b, 75MS/s pipelined A/D converter. In this proof-of-concept study, a critical precision amplifier of the first converter stage was replaced by a power efficient, but rather imprecise and non-linear open-loop gain stage. An added digital post-processor uses statistics based system identification techniques to recover conversion accuracy in the digital domain. Highlights of this design include amplifier power savings greater 60% and the digitally driven signal-to-noise ratio improvement from 48dB to 68dB. The talk will conclude by discussing some of the future opportunities and challenges in this area of research.
Boris Murmann received the Dipl.-Ing. degree in Communications Engineering from FH Dieburg, Germany in 1994. He received the M.S. degree in Electrical Engineering from Santa Clara University, CA in 1999. From 1994 until 1997 he was with Neutron Mikrolektronik GmbH, Hanau, Germany, where he was involved in the design of high-voltage, smart-power, and ultra-low power ASICs in CMOS technology. In 1992 and 1999 he held Engineering Intern positions in the field of Analog Circuit Design with R&E International Inc., King of Prussia, PA. During the summer of 2001, Mr. Murmann was with the High-Speed Converter group of Analog Devices, Wilmington, MA. Since 1999, Mr. Murmann has been working toward the Ph.D. degree in Electrical Engineering at the University of California, Berkeley, focusing on high speed A/D conversion.
SSC Technical meetings of SCV are held on The
THIRD Thursday of each month at:
Cadence Building 5 which is located at 2655 Seely Ave, San Jose,
95134.
Refreshments are provided at 6:00 PM and the talk typically starts at 7:00 PM.