IEEE Santa Clara Valley Solid State Circuits RFIC Short Course
Dates: Monday, October 15 2007 6pm - 9pm
Tuesday, October 16 2007 6pm - 9pm
Monday, October 15 2007
6:50pm - 7:10pm
Speaker: J.L. Julian Tham, Vice President RF and Mixed Signal Design, SiPORT
Subject: Transceiver Architectures
8:10pm - 9pm
Speaker: Dr. Derek Shaeffer, RF Engineering Manager, BECEEM
Subject: PLL Design
Tuesday, October 16 2007
6pm - 6:50pm
Speaker: Dr. Masoud Zargari, Director Analog Design, Atheros Communications
Subject: LNA Design
8:10pm - 9pm
Speaker: Dr. Alireza Shirvani, RF Design Manager, Marvell
Subject: RF Power Amplifiers
Location
National Semiconductor, Building E Auditorium
(Please see the map on IEEE Santa Clara Valley Solid State Circuits Society web site)
Price:
IEEE Members: $90
Nonmembers: $100
Make checks payable to: Santa Clara Valley IEEE Solid State Circuits Chapter
For Registration send email to scv_ssc_rfic(AT)yahoo(DOT)com.
Please provide the following information:
Name/Affiliation:
IEEE number: (if IEEE member)
Email address: (for further information)
Telephone: (for contacting information only)
Participants will receive the presentations following the course at the email address provided.
First 45 participants will also receive an ISSCC RFIC course CD.
For additional information contact Course Organizers:
Dan Oprica, SCV SSCS Programs Chair, opricad(AT)ieee(DOT)org
Kiran Gunnam, Marvell, kgunnam(AT)ieee(DOT)org
Pete Edwards, Cadence Design System, pedwards(AT)cadence(DOT)com
Perry Chow, SCV SSCS Web Master, aceperry(AT)ieee(DOT)org
|
|
