Lecture Announcement

Organizer:IEEE Solid-State Circuits Society
Title: Mixed-Mode ESD Protection Circuit Simulation-Design
          Methodology for Design Prediction -
         All You Need to Know for IC Protection Design
Speaker:
            Prof. Albert Wang
            Illinois Institute of Technology

Abstract:
ESD (Electro-Static Discharge) induced failure becomes a major IC reliability problem as semiconductor IC technologies migrate into the VDSM (very-deep-sub-micron) ULSI (ultra large scale integration) regime. On-chip ESD protection circuitry is required to protect IC chips against ESD damages. Particularly, ESD design for mixed-signal & RF IC is a new challenge to IC designers. Currently, trial-and-error approaches still dominate in ESD design practices, largely due to the lack of predictive ESD simulation capacity. This talk will outline the principles of ESD protection circuit design and discuss a new mixed-mode ESD simulation-design methodology developed at the Integrated Electronics Laboratory, Illinois Institute of Technology. Practical ESD protection circuit design examples will be provided. This lecture aims to assist IC circuit designers in dealing with real-world ESD protection circuit design problems. Those who are interested in more details are referred to a short course, ECE723 Advanced ESD Protection Design For Integrated Circuits, offered by the Department of Electrical and Computer Engineering at the Illinois Institute of Technology.

Reference Book: 
ON-CHIP ESD PROTECTION FOR INTEGRATED CIRCUITS: An IC Design Perspective,
by Albert Wang, Kluwer Academic
Publishers, 2002, ISBN: 0-7923-7647-1.
Biography:
Albert Wang received the B. Eng. Degree in EE from Tsinghua University, China, in 1985, the MSEE Degree from The Chinese Academy of Sciences, China, in 1988 and the PhD Degree in EE from The State University of New York at Buffalo in 1995. He was with National Semiconductor Corporation until 1998 when he joined the Faculty of Electrical and Computer Engineering of the Illinois Institute of Technology, where he is currently directing the Integrated Electronics Laboratory. His research interests center on analog/mixed-signal/RF ICs, advanced on-chip ESD protection, IC CAD and modeling, SoCs and semiconductor devices, etc. He received the CAREER Award from the National Science Foundation in 2002. He is the author of the book “On-Chip ESD Protection for Integrated Circuits – An IC Design Perspective” (Kluwer, 2002) and sixty papers in the field, and holds several U.S. patents. He is an IEEE Distinguished Lecturer for the Electron Devices Society and the Solid-State Circuits Society, an IEEE EDS AdCom Member, Vice Chair of EDS Regions and Chapters Committee for North America West and a Member of the EDS VLSI Technology and Circuits Committee. He serves as Technical Program Committee Member, Sub-Committee Chair and Session Chair for many conferences, e.g., IEEE CICC, RFIC, APC-CAS, ASP-DAC, etc. Prof. Wang is an Editor of the IEEE Electron Devices Letters starting 2003. He is an IEEE Senior Member, a frequent speaker at various industrial/academic/ international forums and a frequent consultant to the IC industry.
                                                                     
Time and Location:
Friday, March 7, 2003
Time: 5:00 PM
  Room: SF1105, Sanford Fleming Building
    U. of Toronto, King's College Circle


Refreshments will be served. All are welcome!


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