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May 12 to 15, 2002
Hotel Fort Garry, Winnipeg, Manitoba, Canada

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TECHNICAL PROGRAM

TA2 Oral Session:
Computer Hardware 2
Tuesday Afternoon, May 14
Time:
Room:
14h00 - 15h20
Salon AB
Chairs:
  • B. Cockburn
  • S. Tahar
  • TA2.1 (389) 14h00 - 14h20
    A study of bit planes for the compression of raw synthetic aperture radar data
    Brunham, K., El Boustani, A., and Kinsner, W.
    Department of Electrical and Computer Engineering, Signal and Data Compression Laboratory, University of Manitoba, Winnipeg, Canada, and TRLabs, Winnipeg, Canada

    IEEE CCECE02 Proceedings; ISBN: 0-7803-7514-9; vol. 1, pp. 347-352

    TA2.2 (273) 14h20 - 14h40
    Performance evaluation of VBR traffic in infiniband
    Alfaro, F., Sanchez, J., Orozco, L.*, and Duato, J.**
    Department de Informatica, Escuela Politecnica Superior, Uni. de Castilla-La Mancha, Albacete, Spain
    *School of Information Technology and Engineering, University of Ottawa, Ottawa, Canada
    **Department de Informatica de Sistemas y Computadores, Uni. Politecnica de Valencia, Valencia, Spain

    IEEE CCECE02 Proceedings; ISBN: 0-7803-7514-9; vol. 3, pp. 1532-1537

    TA2.3 (398) 14h40 - 15h00
    Efficient parallel implementation of motion estimation on the computational RAM architecture
    Ai, H., Li, N., Li, T., Mandal, M. and Cockburn, B.
    Department of Electrical and Computer Engineering, University of Alberta, Edmonton, Canada

    IEEE CCECE02 Proceedings; ISBN: 0-7803-7514-9; vol. 2, pp. 609-613

    TA2.4 (355) 15h00 - 15h20
    Behavioral modeling of the ADSP-2100 processor using HOL
    Habibi, A., Tahar, S., and Ghazel, A.*
    Department of Electrical and Computer Engineering, Concordia University, Montreal, Canada
    *Ecole Superieure des Communications de Tunis, Ariana, Tunisia

    IEEE CCECE02 Proceedings; ISBN: 0-7803-7514-9; vol. 2, pp. 614-619




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