- Title
- OrCAD Workshop: Part 2
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Date: |
February 5, 2002
Tuesday
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| Time: |
6:00 - 8:30 PM |
| Place: |
University of Manitoba
New Engineering Bldg.
Room 517
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Contacts
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- Speaker
- Kalen Brunham, B.Sc., EIT
Department of Electrical and Computer Engineering
University of Manitoba
- Organizers & Sponsors
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- Department of Electrical and Computer Engineering,
- IEEE Communications Chapter,
and
- IEEE Communications Chapter
- IEEE Computer Chapter
- Telecommunications Research Laboratories (TRLabs), Winnipeg
- Fees
| IEEE Members: |
Students Professionals |
$5 $20 |
General Public: |
Students Professionals |
$5 $20 |
| NOTE: |
The fee covers the materials distributed and refreshments. |
- Parking
- Metered close to the Engineering Bldg.
- Free in Lot U.
- Attendance: Limited to 15.
SYNOPSIS
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Abstract:
The introduction to OrCAD workshop is designed as a two-evening short course with both lecture and hands-on learning. The workshop will focus on the schematic and PCB design capabilities of OrCAD using OrCAD Capture and OrCAD Layout. Part One of the workshop has two components: (i) Basics of OrCAD Capture and (ii) Basics of OrCAD Layout. The first component discusses the basic OrCAD design flow, flat and hierarchical schematic design in OrCAD, an introduction to the OrCAD capture GUI, followed by the hands-on design of a simple circuit in OrCAD capture. In the second component, fundamentals in the layout design flow are discussed, followed by an overview of the OrCAD layout GUI. The hands-on design concludes this part of the workshop, with the PCB layout of the design circuit from basics of OrCAD capture.
Part Two of the workshop discusses: (i) Intermediate Techniques for OrCAD Capture, and (ii) Intermediate Techniques for OrCAD Layout. Using OrCAD capture multi page schematic designs are discussed using both hierarchy and off-page connectors. Part and library creation are also discussed followed by the hands-on design of a medium complexity circuit. Topics discussed using OrCAD layout include multi layer board design, plane layers, copper pours, and PCB footprint creation. The workshop concludes with the PCB layout of the medium complexity circuit using multiple PCB layers.
Bio:
Kalen Brunham obtained his B.Sc. (Computer Engineering) from the University of Manitoba in May 2000. During his undergraduate studies, he spent 18 months as an electronics designer intern at Vansco Electronics, Winnipeg. He is currently working on a Master's postgraduate degree with Professor Kinsner on compression for synthethic radar imaging applications. His research interests include embedded computing systems and the design of custom computing engines using programmable logic devices (PLDs). He is also working in conjunction with the Telecommunications Research Laboratories (TRLabs) as a graduate research fellow.
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