Multiplicador escalable de cuerpos finitos
(A Scalable Finite Field Multiplier)
Joan Josep Climent (email@example.com)1, Federico García Crespi (firstname.lastname@example.org)2, Angel Grediaga (email@example.com)3
1Universidad Alicante2Universidad Miguel Hernández de Elche3Universidad de Alicante
This paper appears in: Revista IEEE América Latina
Publication Date: Dec. 2008
Volume: 6, Issue: 7
The hardware ‑ software codesign of cryptosistems, is the best solution to reach a reasonable yield in systems with resources limitation. In the last years, the cryptosistems based on elliptic curves (CEE) have acquired an increasing importance, managing at present to form a part of the industrial standards. In the underlying finite field of an CEE squaring and field multiplication is the next computational costly operations other than field inversion.
This paper presents an algorithm for multiplication in binary fields GF(2^m) using a polynomial basis representation and with interleaving reduction. The finite field multiplier operates over a variety of binary fields and it is scalable.
finite field arithmetic, FPGA, binary field, scalable multiplier, interleaving reduction, polynomial representation.
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