Implementación del Algoritmo QRD-RLS sobre FPGA. Aplicación a un Sistema Cancelador de Ruido (Implementation of QRD-RLS algorithm on FPGA. Application to Noise Canceller System)

Miguel Enrique Iglesias (mgi@cdea.co.cu)


Centro de Desarrollo de la Electrónica y la Automática (CDEA)
This paper appears in: Revista IEEE América Latina

Publication Date: July 2011
Volume: 9,   Issue: 4 
ISSN: 1548-0992


Abstract:
This article describes one of the many applications of adaptive filtering algorithms, in this case the noise reduction or cancellation in particular using the QRD-RLS algorithm, conducting its implementation on FPGA and taking as the cornerstone of the work, the flexibility of these devices and the advantages of hardware acceleration algorithms in certain applications.

Index Terms:
FPGA , QRD-RLS , algorithm   


Documents that cite this document
This function is not implemented yet.


[PDF Full-Text (274)]