Implementação em VHDL de um Processador de FFT Flexível e Parametrizável (VHDL Implementation of a Flexible and Synthesizable FFT Processor)

Ilan Sousa Correa (ilan@ufpa.br), Lilian Coelho Freitas (liliancf@ufpa.br), Aldebaro Klautau (aldebaro@ufpa.br), João Crisóstomo Weyl Albuquerque Costa (jweyl@ufpa.br)


Universidade Federal do Pará
This paper appears in: Revista IEEE América Latina

Publication Date: Jan. 2012
Volume: 10,   Issue: 1 
ISSN: 1548-0992


Abstract:
This paper presents the current stage of development of a fast Fourier transform (FFT) processor in VHDL. This processor uses fixed-point as numeric representation, taking advantage of the facilities provided by the IEEE fixed point package. Its main advantages is that it is being developed as fully parameterizable processor, in a way that the number of bits, fixed point position and number of points computed in the FFT can be easily changed. It is also able to be used in several applications such as classification algorithms and communications systems. An open source prototype core has been developed and it can perform a complete FFT transform using radix-2 with decimation in time. Results and details of this implementation are presented.

Index Terms:
VHDL language, digital hardware design, FFT   


Documents that cite this document
This function is not implemented yet.


[PDF Full-Text (374)]