Análisis de Factibilidad para la Integración de un OpenSPARC T1 y un Procesador de Petri para conformar un Sistema con Capacidad de Sincronización por Hardware (Analysis for the integration feasibility of OpenSPARC T1 and a Petri Nets processor to form a system with hardware synchronization capability)

Julían Nonino (noninojulian@gmail.com), Ignacio Furey (noninojulian@gmail.com), Carlos R. Pisetta (noninojulian@gmail.com), Orlando Micolini (omicolini@efn.uncor.edu)



This paper appears in: Revista IEEE América Latina

Publication Date: Feb. 2013
Volume: 11,   Issue: 1 
ISSN: 1548-0992


Abstract:
OpenSPARC T1 is the open source version of the UltraSPARC T1 processor developed by Sun Microsystems. XiIinx development kit with a Virtex-5 gives the chance to test and change it. We analyzed the performance of the parts of OpenSPARC and Petri processor. We have considered several possibilities of adding a Petri processor to improve performance of processes that require synchronization

Index Terms:
FPGA, OpenSPARC T1, Petri Nets, Synchronization, VIRTEX-5   


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