Call for Papers

Technical Program
Sunday, Oct. 29, 2006
Monday, Oct. 30, 2006

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Technical Program

Sunday, October 29, 2006

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9:45:00 AM Poster Setup
10:45 AM Opening Remarks
10:50 AM High Throughput, Parallel, Scalable LDPC Encoder/Decoder Architecture for OFDM Systems
Yang Sun, Marjan Karkooti, Joseph Cavallaro
Rice University, Houston, U.S.A.
11:10 AM Power-Supply Noise Attributed Timing Jitter in Nonoverlapping Clock Generation Circuits
Adam Strak, Hannu Tenhunen
KTH - Royal Institute of Technology, Sweden
11:30 AM Optimal Gate Size Selection for Standard Cells in a Library
Vipul Singhal, Girishankar G.
Texas Instruments, Bangalore, India
11:50 AM Exact Toffoli Network Synthesis of Reversible Logic using Boolean Satisfiability
Daniel Grosse, Xiaobo Chen, Rolf Drechsler
University of Bremen, Germany
12:10 PM Lunch
2:00 PM Grand Challenge: The Future of CMOS System-on-Chip Hardware and Software Application Development
Brian Von Herzen, Mike Lerer
Rapid Prototypes, U.S.A.
2:20 PM A Built-in Tester for Modulation Noise in a Wireless Transmitter
Oren Eliezer, Ofer Friedman, R. Bogdan Staszewski
Texas Instruments, Dallas, U.S.A.
2:40 PM Efficient Procedures for Analyzing Large-scale RF Circuits
Josef Dobes
Czech Technical University in Prague, Czech Republic
3:00 PM Break
3:30 PM Feedforward Interference Cancellation in Narrow-Band Receivers
Ranjit Gharpurey, Sahar Ayazian
University of Texas, Austin, U.S.A.
3:50 PM Analog-to-Information Conversion via Random Demodulation
Sami Kirolos, Jason Laska, Michael Wakin, Marco Duarte, Dror Baron, Tamer Ragheb, Yehia Massoud, Richard Baraniuk
Rice University, Houston, U.S.A.
4:10 PM A Fixed-Point Implementation for QR Decomposition
Chitranjan K. Singh, Sushma H. Prasad and Poras T. Balsara
University of Texas at Dallas, Richardson, U.S.A.
  Sunday Posters
  Design Methodology of On-Chip Power Distribution Network
Hirokazu Tohya, Noritaka Toya
ICAST Inc., Japan
  Phase Noise Reduction in High Frequency Divider
Rahul Prakash, Siraj Akhtar* and Poras T. Balsara
University of Texas at Dallas, Richardson, Texas, *Texas Instruments, Inc. Dallas, Texas
  Performance Optimization of Re-Convergent Manchester Carry Chain Adders
Kumar Yelamarthi, Henry Chen
Dayton, U.S.A.
  Noise Analysis of Time-to-Digital Converter in All-Digital PLLs
Socrates Vamvakos, R. Bogdan Staszewski, Mahbuba Sheba, Khurram Waheed
Texas Instruments, Dallas, U.S.A.
  An Approach to Interference Detection for Ultra Wideband Radio Systems
Tien-Ling Hsieh, Peter Kinget*, Ranjit Gharpurey
University of Texas, Austin, U.S.A.
*Columbia University, U.S.A.
  Dynamic Multi-Point Rational Interpolation for Frequency-Selective Model Order Reduction
Mehboob Alam, Arthur Nieuwoudt, Yehia Massoud
Rice University, Houston, U.S.A.
  Novel Voltage-Mode Structurely Allpass Filters without External Passive Components
Nil Tarim, Fatih Golcuk, Oguzhan Cicekoglu*, Hakan Kuntman
Istanbul Technical University, Turkey, *Bogazici University, Turkey.

Tuning Word Retiming of a Digitally-Controlled Oscillator Using RF BIST
Imran Bashir, R. Bogdan Staszewski, Oren Eliezer
Texas Instruments, Dallas, U.S.A.




Keynote Talk
Short Distance Wireless

Prof. Jan Rabaey
UC Berkeley


Invited Talks

Mixed-Domain Signal Processing
Prof. Yannis Tsividis
Columbia University

Cellular Handset Integration
Dr. Bill Krenik
Texas Instruments

Digitally Assisted Analog Circuits
Prof. Boris Murmann
Stanford University

Reversible Computing & Truly Adiabatic Circuits: The Next Challenge for Digital Engineering
Prof. Michael Frank
Florida State Univ.