Glossary of Terms
CPMT – Components Packaging and Manufacturing Technology (Society). An international Technical Society of the IEEE. It is dedicated to scientists and engineered engaged in the research, design and development of advances in microsystems packaging and manufacture.
IEEE – Institute of Electrical and Electronics Engineers. Founded in 1884, it is the world’s largest technical professional society, consisting of over 360,000 member in over 150 countries.
Accelerated Stress Test – A test conducted at a stress, e.g., chemical or physical, higher than that encountered in normal operation, for the purpose of producing a measurable effect, such as a fatigue failure, in a shorter time than experienced at operating stresses.
Alloy - A solid state solution of two or more metals. (v.) To melt or make an alloy.
Backside Metallurgy (BSM) – A metallization pad electrically connected to internal conductors within a multilayered ceramic package, to which pins are brazed.
Ball Grid Array (BGA) – An area array of solder balls joined to a SCM or MCM and used to electrically and physically connect the package to the next level of package, usually a printed circuit board.
Ball Limiting Metallurgy (BLM) – The solder wettable terminal metallurgy, which defines the size and area of a soldered connection, such as C4 and a chip. The BLM limits the flow of the solder ball to the desired area, and provides adhesion and contact to the chip wiring.
C4 – Controlled collapse chip connection.
Ceramic – Inorganic, nonmetallic material, such as alumina, beryllia, or glass-ceramic, whose final characteristics are produced by subjection to high temperatures. Often used in forming ceramic-substrates for packaging semiconductor chips.
Ceramic Ball Grid Array (CBGA) – A ceramic package using ball grid array technology.
Chip – The uncased and normally leadless form of an electronic component part, either passive or active, discrete or integrated. Also referred to as a die.
Chip-on-Board (COB) – One of the many configurations in which a chip is directly bonded to a circuit board or substrate. These approaches include wirebonding, TAB, or solder interconnections, similar to the C4 structure. In low-end consumer systems, chip-on-board generally refers to wirebonding of chips directly to board. See also Direct Chip Attach.
Component – An element of equipment which unto itself does not form a system. Components can be semiconductors, resistors, etc.
COTS – Commercial off-the-shelf.
Die – Integrated circuit chip as cut (diced) from finished wafer. See chip.
Dielectric – Material that does not conduct electricity. Generally used for making capacitors, insulating conductors (as in crossover and multilayered circuits) and for encapsulating circuits.
Dielectric Constant (Dk) – The term used to describe a material’s ability to store charge when used as a capacitor dielectric. It is the ratio of the charge that would be stored with free space to that stored with the material in question as the dielectric.
Direct Chip Attach – A name applied to any of the chip-to-substrate connections used to eliminate the first level of packaging. See also Chip-on-Board.
Dual-in-Line Package (DIP) – A package having two rows of leads extending at right angles from the base and having standard spacing between leads and between rows of leads. DIPs are made of ceramic (Cerdip) and plastic (Pdip).
Engineering Change (EC) – A change in design. An electrical design change is frequently implanted by cutting out or adding an electrical path to the manufactured hardware, e.g., laser deleting a line or adding a wire on a ceramic substrate.
Flip Chip – Unpackaged silicon dies that have been supplied with solder balls directly on the active side of the die. They are called flip chips because they are flipped upside-down, compared to a conventional wirebonded chip.
Integrated Circuit (IC) ––A miniature or microelectronic device that integrates such elements as transistors, resistors, dielectrics and capacitors into an electrical circuit possessing a specific function. Form the basis of all modern electronic products.
Intellectual Property - Property produced by effort of the mind, as distinct from real or personal property. Intellectual property may or may not enjoy the benefit of legal protection.
Interconnect - A highly conductive material, usually aluminum or polysilicon, that carries electrical signals to different parts of a die.
ISO – International Standards Organization.
Lithography – The process in semiconductor manufacturing in which chip designs are projected onto silicon wafers.
MEMS –Micro-Electro-Mechanical Systems.
Microelectronics – Those micro devices, such as integrated circuits, which are fabricated in sub-micron dimensions and which form the basis of all electronic products.
Microsystems – Microminiaturized and integrated systems based on microelectronics, photonics, RF, micro-electro-mechanical systems (MEMS) and packaging technologies.
Moore’s Law – Moore's Law is an observation made in 1965 by Intel co-founder Gordon Moore that the number of transistors on a chip doubles about every 18 months, which translates to higher performance for roughly the same manufacturing cost..
Multilayer Ceramic (MLC) – Ceramic substrate consisting of multiple layers of metals and ceramics interconnected with vias.
Multichip Package (MCP) – An electronic package that caries a number of chips and interconnects them through several layers of conductive patterns. Each one is separated by an insulative layer and interconnected via holes.
Nano – One thousand millionth.
Nanotechnology - The development and use of devices that have a size of only less than 200 nanometres.
Optoelectronics – The combination of photonics and microelectronics. When they are packaged together, they provide the capacity to generate, transport and manipulate data at phenomenal rates.
Packaging – The bridge that interconnects the ICs and other components into a system-level board to form electronic products.
Passives – Circuit elements such as resistors and capacitors which do not change state when subjected to voltage or current.
PGA (Pad Grid Array or Pin Grid Array) – PGA may refer to a pad grid array or a pin grid array. A pad grid array refers to a packaging technology in which a device’s external connections are arranged as an array of conducting pads on the base of the package. A pin grid array refers to a packaging technology in which a device’s external connections are arranged as an array of conducting leads, or pins, on the base of the package.
Photonics – The technology that uses light particles (photons) to carry information over hair-thin fibers of very pure glass.
Printed Circuit Board (PCB) – A type of circuit board which has conducting tracks superimposed, or "printed," on one or both sides, and may also contain internal signal layers and power and ground planes. An alternative name, Printed Wire Board (PWB), is commonly used in America.
RF – Radio Frequency. That part of the spectrum from approximately 50kHz to gigahertz.
Screen Printing – Printing through a screen or stencil.
Semiconductor – A special class of materials that can exhibit both conducting and insulating properties.
Silicon - A brittle, gray, crystalline chemical element which, in its pure state, serves as a semiconductor substrate in microelectronics. It is naturally found in compounds such as silicon dioxide.
Single Chip Package (SCP) – A package that supports a single microelectronics device so that its electrical, mechanical, thermal and chemical performance needs are adequately served.
SOC – System-on-a-Chip
SOP – System-on-Package – A single component, multi-function, multi-chip package providing all the needed system-level functions. Functions include analog, digital, optical, RF and MEMS.
Solder – A low melting point alloy used in numerous joining applications in microelectronics. The most common solders are lead-tin alloys. Typical solder contains 60% tin and 40% lead - increasing the proportion of lead results in a softer solder with a lower melting point, while decreasing the proportion of lead results in a harder solder with a higher melting point.
Surface Mount Technology (SMT) – A method of assembling hybrid circuits and printed wiring boards where component parts are mounted onto, rather than into, the printed-wiring boards, as in the mounting components on substrates in hybrid technology.
Tape Automated Bonding (TAB) – The process where silicon chips are joined to patterned metal on polymer tape (e.g., copper on polymide), using thermocompression bonding, and subsequently attached to a substrate or board by outer lead bonding. Intermediate processing may be carried out in strip form through operations such as testing, encapsulation, burn-in, and excising the individual packages from the tape.
Wafers - Slices of semiconductor crystal materials used as substrates for monolithic ICs, diodes and transistors.
Wire Bonding - The method used to attach very fine wire to semiconductor components to interconnect these components with each other or with package leads.
