Design Tips

Welcome to Design Tips! In this issue, I will discuss how easy it is to create common mode noise on differential signal lines! This common mode can then create a significant amount of EMI problems.
     Please send me your most useful design tip for consideration in this section. Ideas should not be limited by anything other

than your imagination! Please send these submissions to bruce.arch@ieee.org. I’ll look forward to receiving many “Design Tips!” Please also let me know if you have any comments or suggestions for this section, or comments on the Design Tips articles.

 

Differential Signals are NOT
Immune to EMI/EMC Concerns!

By Bruce Archambeault, Ph.D., IBM Distinguished Engineer, barch@us.ibm.com
Sam Connor, IBM Senior Technical Staff Member, sconnor@us.ibm.com

 

Introduction
The use of so-called differential signaling for high speed signals has become very common in today’s high speed system designs. While this signal strategy allows better data quality and signal integrity at the receive end of the printed circuit board (PCB) traces and/or cables, there are some significant EMC and signal integrity issues that are not readily apparent. This discussion demonstrates that significant amounts of common-mode signals can be created when the differential signals have small amounts of in-pair skew (delay), or if the rise/fall times are different. These common mode signals can have a significant impact on the EMC performance, causing significant levels of emissions unless careful design consideration is given to common-mode current return (ground return).
     Many differential signal drivers in today’s high speed system designs actually use a pair of complementary single-ended drivers (once the actual drivers are analyzed in the driving IC). That is, both traces are driven out of phase with respect to the PCB ground-reference. For this reason, we call these nets “pseudo-differential.” At the receive end, the ASIC is usually a true differential receiver which only looks for the difference between the two nets, without reference to the PCB ground-reference plane. In this way, the complementary single-ended nets become differential at the receiver. Since the receiver is only measuring the difference between the two nets, any common mode signals (signals that exist on both nets at the same time and in phase) are ignored by the receiver. This provides additional signal quality and allows longer traces to be used for higher data rates than the traditional single-ended nets since much of the incident noise is coupled equally to both legs of the differential pair. Even if true differential drivers are used, small amounts of path length difference within the IC or on the PCB will cause significant in-pair skew, and slight differences with the IC will cause some rise/fall time mismatch.
     From an EMC perspective, the common mode signals on these traces and cables can cause the same problems as any single-ended trace/cable. In fact, common mode signals cause these traces and cables to be equivalent to high speed single-ended nets from the EMI/EMC point of view. Common mode signals can be found by adding the two signals.


Effects of Skew
Skew can occur because of trace length mismatch in the IC package, on the PCB, or in connectors between PCBs. Very careful length matching is needed to insure the resulting skew is not significant. This is especially difficult for very high speed signals.
     An example pseudo-differential signal of 2 Gb/s (500 ps pulse width) with a nominal rise/fall time of 50 ps was created using a spreadsheet program. The output of the complementary driver was delayed, introducing skew from 10 to 200 ps. This skew represents a skew of 0.2% to 40% of the pulse width. The resulting common mode voltage waveforms are shown in Figure 1.
     The harmonic amplitude of the common mode voltage is shown in Figure 2. Even small percentages of skew can easily create significant common mode harmonic content. While the larger amounts of skew would likely not be tolerated in a real world system, even skew as low as 10% of the bit width (easily tolerated in most systems) can create significant common mode noise.

 

Figure 1. Common Mode Voltage Created from In-Pair Skew. Figure 2. Harmonic Content of Common Mode Signal Caused by In-pair Skew.

 


Effects of Rise/Fall Time Mismatch
Rise/fall time mismatch is usually caused within the IC itself. Figure 3 shows an example for a 2 Gb/s signal. Note that the common mode signal occurs on both rising and falling edges, so the fundamental harmonic frequency is twice the differential signal. This fact can be useful when performing debugging in the EMC lab, because if the trouble frequency is an even harmonic of the data rate, then it is most likely caused by rise/fall time mismatch and created within the IC. Figure 4 shows the harmonic energy for a few different cases of mismatched rise/fall times. Again, the levels can be significant. While the rise/fall time mismatch would likely not cause any intentional data quality problems, the EMI impact can be significant.

 

Figure 3. Example of Common Mode Voltage Caused by
Rise/Fall Time Mismatch.
Figure 4. Harmonic Content of Common Mode Voltage Caused by Rise/Fall Time Mismatch.

 


Effects of Amplitude Mismatch
The third way that common mode noise can be created is due to amplitude mismatch between the two channels. Small amounts of mismatch can create significant common mode noise, as shown in Figure 5. The harmonic content is shown in Figure 6. Again, small amounts of amplitude mismatch would most likely have no impact on the intentional signal, but a significant amount of common mode noise is created.

 

Figure 5. Common Mode Voltage Caused by Amplitude
Mismatch.
Figure 6. Harmonic Content of Common Mode Voltage Caused by Amplitude Mismatch.


Summary
Relatively small amounts of imbalance in the differential signal pair can cause significant amounts of common mode noise, resulting in potential EMI problems. Skew, rise/fall time mismatch, and amplitude mismatch are all possible causes for the common mode signals.
Other possible causes of common mode noise are any asymmetry in the channel routing. For example, if a differential pair is routed very close to the edge of the ground-reference plane, then the impedance of each trace will be different, and common mode signals will be created. This can also occur when the signals go through vias to different layers in the PCB and there is a ground-reference via close to one of the signal vias and not the other signal via. The asymmetry will cause the differential mode to common mode conversion.              EMC

 

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