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IEEE TFS: Abstracts of Published Papers, vol. 4, no. 4

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Computer-aided design of fuzzy systems based on generic VHDL specifications
T. Hollstein, S. K. Halgamuge, M. Glesner
Inst. of Microelectron. Syst., Darmstadt Univ. of Technol., Germany
vol. 4, no. 4, pp. 403-17, Nov. 1996

In this paper, three types of fuzzy systems and related hardware architectures are discussed: standard fuzzy controllers, FuNe I fuzzy systems, and fuzzy classifiers based on a neural network structure. Two computer-aided design (CAD) packages for automatic hardware synthesis of standard fuzzy controllers are presented: a hard-wired implementation of a complete fuzzy system on a single or multiple field programmable gate arrays (FPGA) and a modular toolbox called fuzzyCAD for synthesis of reprogrammable fuzzy controllers with architectures due to specified designer constraints. In the fuzzyCAD system, an efficient design methodology has been implemented which covers a large design space in terms of signal representations and component architectures as well as system architectures. Very high speed integrated-circuits hardware-description language (VHDL) descriptions and usage of powerful synthesis tools allow different technologies to be targeted easily and efficiently. Properties and hardware realizations of fuzzy classifiers based on a neural network are introduced. Finally, future perspectives and possible enhancements of the existing toolkits are outlined.

A silicon compiler of analog fuzzy controllers: from behavioral specifications to layout
N. Manaresi, R. Rovatti, E. Franchi, R. Guerrieri, G. Baccarani
Dept. of Electron., Bologna Univ., Italy
vol. 4, no. 4, pp. 418-28, Nov. 1996

In this paper, a silicon compiler for analog fuzzy controllers is described. The layout is generated automatically, starting from global-system specifications accepted as a set of classical fuzzy rules involving fuzzy sets as well as numerical data, often available from numerical examples. The system relies on a library of basic cells designed using a CMOS n-well 0.7 mu m technology and on the use of Cadence software. Multi-inputs multi-outputs fuzzy logic-based controllers are synthesized, and the area and power requirements by any specific application are optimized. Some prototypes designed using the proposed methodology have been fabricated. For example, a two-inputs two-outputs fuzzy controller implementing a 2D rational function and a sinusoidal function requires, including the I/O circuitry, 1.9 mm/sup 2/ of silicon area, and the total power consumption is 44 mW at 5 V power supply. The maximum propagation delay, assuming a step input function, is 0.57 mu sec. The total computation time using a SUN Sparc2 Workstation is about 25 min, from specification of the expected behavior to layout.

Design and application of an analog fuzzy logic controller
S. Guo, L. Peters, H. Surmann
GMD-SET, St. Augustin, Germany
vol. 4, no. 4, pp. 429-38, Nov. 1996

In this paper, we present an analog fuzzy logic hardware implementation and its application to an autonomous mobile system. With a simple structure the fabricated fuzzy controller shows good performance in processing speed and area consumption. Accomplished with 13 reconfigurable rules, a speed of up to 6 MFLIPS has been achieved. To stress the advantages of the new architecture, speed and flexibility, the same control strategy is implemented on the new analog fuzzy controller and on a digital multipurpose microcontroller in software. The results of the two implementations show that the analog approach is not only faster but also flexible enough to compete with digital fuzzy approaches.

Digital fuzzy logic controller: design and implementation
M. J. Patyra, J. L. Grantner, K. Koster
Dept. of Electr. & Comput. Eng., Minnesota Univ., Duluth, MN, USA
vol. 4, no. 4, pp. 439-59, Nov. 1996

In this paper, various aspects of digital fuzzy logic controller (FLC) design and implementation are discussed, Classic and improved models of the single-input single-output (SISO), multiple-input single-output (MISC), and multiple-input multiple-output (MIMO) FLCs are analyzed in terms of hardware cost and performance. A set of universal parameters to characterize any hardware realization of digital FLCs is defined. The comparative study of classic and alternative MIMO FLCs is presented as a generalization of other controller configurations. A processing element for the parallel FLC architecture realizing improved inferencing of MIMO system is designed, characterized, and tested. Finally, as a case feasibility study, a direct data stream architecture for complete digital fuzzy controller is shown as an improved solution for high-speed, cost-effective, real-time control applications.

A 12b general-purpose fuzzy logic controller chip
H. Eichfeld, T. Kunemund, M. Menke
Corp. Res. & Dev., Siemens AG, Muenchen, Germany
vol. 4, no. 4, pp. 460-75, Nov. 1996

The digital CMOS 12b fuzzy coprocessor chip SAE 81C991 is presented. Designed as a fuzzy logic controller, the chip exhibits a silicon area of 17.9 mm/sup 2/ and computation speed in the submillisecond region. Real-time fuzzy control or classification tasks in industry electronics, image processing, and automotive are its main fields of applications. Up to 131072 rules, 4096 inputs, and 1024 outputs with arbitrary membership functions can be processed. The definition or fuzzy algorithms is facilitated with ten operation modes, eight inference operators, and four defuzzification methods. Fuzzification of four 12b inputs, inference of 80 rules, and center of gravity defuzzification for a 16b output takes only 16 s. This knowledge base covers only half a kbyte as the memory has to store only the knowledge base data but almost no operation code for the coprocessor. Moreover, the membership functions as part of the knowledge base data are stored with their characteristic values reducing the memory demand significantly in comparison with a look-up table. Minimized memory demand and fuzzy algorithms tailored for digital CMOS logic are the key elements for a small chip area microcontrollers. Interfaces with 8b or 16b microcontrollers are supported.

Fuzzy component network for intelligent measurement and control
J. F. Josserand, L. Foulloy
Savoie Univ., Annecy, France
vol. 4, no. 4, pp. 476-87, Nov. 1996

This paper presents the concept of fuzzy component networks. First, we introduce fuzzy components such as fuzzy sensors, fuzzy actuators, and fuzzy inference components. Then, we describe the implementation of such components into a generic component, called a fuzzy cell. Depending on its configuration, a fuzzy cell is able to perform the functions of one or several fuzzy components. Each fuzzy cell is implemented by means of the Intel 80C196 microcontroller and is connected to a field bus. Fuzzy cells are characterized by their ability to handle and exchange fuzzy symbolic information. Their configuration is performed via the field bus using the language prototype of integrated language for symbolic sensors and actuators (PLICAS) that was specially designed for this purpose. A PLICAS compiler is integrated inside each cell, thus conferring interoperability properties to the cell. Two applications are presented: 1) a fuzzy controller whose fuzzification, inference, end defuzzification interfaces are distributed into three fuzzy cells connected by the fieldbus; and 2) the fusion of information provided by two ultrasonic fuzzy sensors for the detection of obstacles.

Silicon implementation of a fuzzy neuron
T. Yamakawa
Fac. of Comput. Sci. & Syst. Eng., Kyushu Inst. of Technol., Fukuoka, Japan
vol. 4, no. 4, pp. 488-501, Nov. 1996

This paper describes a fuzzy neuron chip which is the modification of an ordinary neuron model by fuzzy logic. The algebraic product of scaler input and connective weights in synapse is replaced by a fuzzy inner product. An excitatory connection is represented by a MIN (minimum) operation and an inhibitory connection by fuzzy logic complement followed by a MIN operation. While an ordinary neuron model is established only by leaning, the fuzzy neuron can be designed and optimized by learning. The fuzzy neuron is implemented in silicon wafer by a standard BiCMOS process. The chip is applied to a handwritten character recognition system and it exhibits very high-speed recognition (less than 500 ns).

Architecture of a testable analog fuzzy logic controller
Z. Jaworski, M. Niewczas, M. Grygolec, W. Kuzmicz
Inst. of Microelectron. & Optoelectron., Warsaw Univ. of Technol., Poland
vol. 4, no. 4, pp. 502-5, Nov. 1996

The authors discuss problems of testability of analog fuzzy logic controllers implemented as VLSI chips. Enhancements to standard architecture of fuzzy logic controllers which facilitate testing are proposed. To improve controllability and observability of internal nodes, analog switching blocks are introduced together with some additional circuitry. These blocks allow one to test each basic cell of a fuzzy logic controller (e.g., membership function cell, MINIMAX cell, etc.) separately. The analog switching blocks do not contribute to the power consumption in a working chip end therefore can be used in low-power analog fuzzy logic controllers.

These abstracts are posted in order to accelerate dissemination of evolving Fuzzy Systems information. The abstracts are from papers published in the IEEE Transactions on Fuzzy Systems (TFS).

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